CS31001 : Computer Organization and Architecture (LTP: 4 0 0, Credits 4)

Detailed Syllabus:

Basic functional blocks of a computer: CPU, memory, input-output subsystems, control unit. Instruction set architecture of a CPU - registers, instruction execution cycle, RTL interpretation of instructions, addressing modes, instruction set. Case study - instruction sets of some common CPUs.

Data representation: signed number representation, fixed and floating point representations, character representation. Computer arithmetic - integer addition and subtraction, ripple carry adder, carry look-ahead adder, etc. multiplication - shift-and-add, Booth multiplier, carry save multiplier, etc. Division - non-restoring and restoring techniques, floating point arithmetic.

CPU control unit design: hardwired and micro-programmed design approaches, Case study - design of a simple hypothetical CPU.

Memory system design: semiconductor memory technologies, memory organization.

Peripheral devices and their characteristics: Input-output subsystems, I/O transfers - program controlled, interrupt driven and DMA, privileged and non-privileged instructions, software interrupts and exceptions. Programs and processes - role of interrupts in process state transitions.

Performance enhancement techniques

Pipelining: Basic concepts of pipelining, throughput and speedup, pipeline hazards.

Memory organization: Memory interleaving, concept of hierarchical memory organization, cache memory, cache size vs block size, mapping functions, replacement algorithms, write policy.

Text Books:

Computer Organization and Design, 4th Ed, D. A. Patterson and J. L. Hennessy

Computer Architecture, Berhooz Parhami

Microprocessor Architecture, Jean Loup Baer

Evaluation Procedure

Class Test : 20 marks

Mid Semester Examination : 30 marks

End Term Examination : 50 marks

Presentations for the class:


Instructions and Addressing

Procedures and Data


The Instruction Set Architecture (ISA):From CISC to RISC

The Datapath Elements

The Single Cycle Instruction Execution Unit

The Multiple Cycle Instruction Execution Unit

Valgrind and VTune Simulators for Understanding Cache Effects

Simplescalar Tool Set

Important Link

The SPIM Tutorial