CS623 : CAD for VLSI Systems (3 1 0 4)

Detailed Syllabus:

Overall perspective of VLSI Design, the MOS switch and CMOS, MOS based logic design, the CMOS logic styles, Pass Transistors, Introduction to Verilog HDL, Combinational logic Design, complex designs using multiplexers/demultiplexers, decoders, Memory elements: flip-flops, latches, registers. Sequential logic Design: Concepts and state diagrams. Design of FSMs, VLSI Design Issues: Timing in Digital Circuits, Data Path Design: Realizations of Computational blocks, like adders, multipliers, Design of Control Path: Hardwired and Micro-controlled.

Text Books:

Digital Integrated Circuits (International Edition), by Jan M. Rabaey (Author), Anantha Chandrakasan (Author), Borivoje Nikolic (Author)

Application Specific Integrated Circuits, by Michael John Sebastian Smith, Addison Wesley

Principles of CMOS VLSI Design, Systems Perspective, Neil H. E. Weste and Kamran Eshraghian

Basic VLSI Design, Douglas A Pucknell and Kamran Eshraghian, Prentice Hall of India

HDL Chip Design: A Practical Guide for Designing, Synthesizing and Simulating ASICs and FPGAs Using VHDL or Verilog, Douglas J. Smith, Doone Publications

Evaluation Procedure

Assignments: 20 marks

Project Work: 30 marks

Mid Semester Examination : 20 marks

End Term Examination : 30 marks

Presentations for the class:

Overall perspective of VLSI Design

The CMOS Inverter and gates: An Overview

Logic 1 and 0, Noise Margin, Computing Gate Delay

Verilog: Zero Delay Modeling of Circuits

Modeling Combinational Logic Circuits

Designing Datapath Elements in Digital Circuits

Designing Sequential Elements in Digital Circuits

Design of Finite State Machines

Designing ControlPath in Digital Circuits

Assignments in the class:

Assignment 1

Assignment 2

Project Work:

Project Work

Examinations for the class:

Mid Sem Examination

Sample Solution to Mid Sem Questions