Virtual Lab - IIT Kharagpur

Design of Memory :

A memory unit is a collection of storage cells together with associated circuits needed to transform insformation in and out of the device. Memory cells which can be accessed for information transfer to or from any desired random location is called random access memory(RAM). The block diagram of a memory unit-

Internal Construction: The internal construction of a random-access memory of m words with n bits per word consists of m*n binary storage cells and associated decoding circuits for selecting individual words. The binary cell is the basic building block of a memory unit.

RAM Design:

Design of a RAM Cell

Design of a 4X4 RAM

Design Issues :

A basic RAM cell has been provided here as a component which can be used to design larger memory units. An IC memory consisting of 4 words each having 3 bits has been aslo provided.

Design of a RAM cell :

The binary cell has three inputs and one output. The select input enables the cell for reading or writing and the reda/write input determines the cell operation when it is selected. A 1 in the read/write input provides the read operation by forming a path from the flip-flop to the output terminal. A 0 in the read/write input provides the write operation by forming a path from the input terminal to the flip-flop. the logic diagram is-

Design of a 4X4 RAM :

The logical construction of a small RAM 4X3 is shown below. It consists of 4 words of 3 bits each and has a total of 12 binary cells. Each block labeled BC represents the binary cell with its 3 inputs and 1 output. The block diagram of a binary cell-

A memory with 4 words needs two address lines. The two address inputs go through a 2*4 decoder to select one of the four words. The decoder is enabled with the memory enable input. When the memory enable is 0, all outputs of the decoder are 0 and none of the memory words are selected. With the memory enable at 1, one of the four words is selected, dictated by the value in the two address lines. Once a word has been selected, the read/write input determines the operation. the logic diagram is-

Design of Memory :

Basic stage

Multiple choice questions:

Design of Memory :

1. Start the simulator as directed.This simulator supports 5-valued logic.
2. To design the circuit we need 12 binary RAM cell, 9 OR gate, 7 bit switch (to give input,which will toggle its value with a double click), 3 bit display (to see the output), wires.
3. The pin configuration of a component is shown whenever the mouse is hovered on any canned component of the palette or press the 'show pinconfig' button. Pin numbering starts from 1 and from the bottom left corner (indicated with the circle) and increases anticlockwise.
4. For a binary RAM cell input is in pin-5, output is in pin-4 and select is pin-8, Read/Write is in pin-6, for read operation give 1 input to Read/Write pin. For write operation give 0 input to Read/Write pin.
5. For a 'decoder with enable', input A is in pin-6, B is in pin-5, output D0 is in pin-4, D1 is in pin-3, D2 is in pin-2, D3 is in pin-1 and Enable is in pin-8
6. Click on the 'decoder with enable' component (in the Other Components drawer in the pallet) and then click on the position of the editor window where you want to add the component (no drag and drop, simple click will serve the purpose), likewise add 12 binary RAM cell (from the Other Components drawer in the pallet), 9 OR gates (from Logic Gates drawer in the pallete), 7 bit switches (which will toggle its value with a double click), 3 bit displays (from Display and Input drawer of the pallet,if it is not seen scroll down in the drawer)
7. To connect any two components select the Connection menu of Palette, and then click on the Source terminal and click on the target terminal. According to the circuit diagram connect all the components, connect 2 bit switches to the inputs of the 'decoder with enable' (which will act as address input), 1 bit switch to the enable pin of the 'decoder with enable' (which will act as memory enable input), connect a bit switch to the Read/Write(R/W') line, 3 bit switches to the data inputs line, 3 bit displays to the data output line and OR gates according to the diagram shown in the circuit diagram. after athe connection is over click the selection tool in the pallete.
8. To see the circuit working, Do some read or write operation by properly setting the R/W', memory enable then give input and check the output. suppose you give, R/W'=1, memory enable=1, address input=01, data input=101, then it will be a read operation and you will not see 101 as output, it will store 101 in the word-1. now again set, R/W'=0, memory enable=1, address input=01, then it will be a write operation and you will see 101 as the content of word-1 on the output display.

Circuit Diagram

Components :

For Designing a RAM Cell

For Designing a 4X3 RAM

To build a RAM Cell, we need :

1. AND Gate(2 input)-6
2. NOT Gate-2
3. RS Flip Flop-1

To build a 4X3 RAM, we need :

1. OR Gate(2 input)-11
2. RAM Cell-12
3. 2X4 Decoder with Enable-1

Objective of memory design(single bit RAM cell):

To design memory units and understand how it operates during read and write operation.

1. understanding behaviour of memory from working module and the module designed by the student as part of the experiment
2. designing an memory for given parameter

Examining behaviour of memory for the working module and module designed by the student as part of the experiment (refer to the circuit diagram):

examining the write behaviour:

• initialization (refer to experiment manual for pin numbers):
  • select=1
  • R/W'=0
• Loading data in the memory (refer to procedure tab for further detail and experiment manual for pin numbers):
  • input(i/p)=1

examining the read behaviour:

• initialization (refer to experiment manual for pin numbers):
  • select=1
  • R/W'=1
• check output:
  • output(o/p)=1
  • it will give the value which was previously written

Recommended learning activities for the experiment: Leaning activities are designed in two stages, a basic stage and an advanced stage. Accomplishment of each stage can be self-evaluated through the given set of quiz questions consisting of multiple type and subjective type questions. In the basic stage, it is recommended to perform the experiment firstly, on the given encapsulated working module, secondly, on the module designed by the student, having gone through the theory, objective and procuder. By performing the experiment on the working module, students can only observe the input-output behavior. Where as, performing experiments on the designed module, students can do circuit analysis, error analysis in addition with the input-output behavior. It is recommended to perform the experiments following the given guideline to check behavior and test plans along with their own circuit analysis. Then students are recommended to move on to the advanced stage. The advanced stage includes the accomplishment of the given assignments which will provide deeper understanding of the topic with innovative circuit design experience. At any time, students can mature their knowledge base by further reading the references provided for the experiment.

Design of Memory :

• Start the simulator as directed. For more detail please refer to the manual for using the simulator
• The simulator supports 5-valued logic
• To add the logic components to the editor or canvas (where you build the circuit) select any component and click on the position of the canvas where you want to add the component
• The pin configuration is shown when you select the component and press the 'show pinconfig' button in the left toolbar or whenever the mouse is hovered on any canned component of palette
• To connect any two components select the connection tool of palette, and then click on the source terminal and then click on the the target terminal
• To move any component select the component using the selection tool and drag the component to the desired position
• To give a toggle input to the circuit, use 'Bit Switch' which will toggle its value with a double click
• Use 'Bit Display' component to see any single bit value. 'Digital Display' will show the output in digital format
• undo/redo, delete, zoom in/zoom out, and other functionalities have been given in the top toolbar for ease of circuit building
• Use start/stop clock pulse to start or stop the clock input of the circuit. Clock period can be set from the given 'set clock' button in the left toolbar
• Use 'plot graph' button to see input-output wave forms
• Users can save their circuits with .logic extension and reuse them
• After building the circuit press the simulate button in the top toolbar to get the output
• If the circuit contains a clock pulse input, then the 'start clock' button will start the simulation of the whole circuit. Then there is no need to again press the 'simulate' button
• If you are using linux platform then click on 'Linux(32 bit)' or if you are using then click on 'Windows(32 bit)'

Linux(32 bit)

Windows(32 bit)

Back

Back

1. Start the simulator as directed.
2. To design the circuit we need 12 binary RAM cell, 9 OR gate, 7 bit switch (to give input,which will toggle its value with a double click), 3 bit display (to see the output), wires.
3. The pin configuration of a component is shown whenever the mouse is hovered on any canned component of the palette. Pin numbering starts from 1 and from the bottom left corner (indicating with the circle) and increases anticlockwise.
4. For a binary RAM cell input is in pin-5, output is in pin-4 and select is pin-8, Read/Write is in pin-6, for read operation give 1 input to Read/Write pin. For write operation give 0 input to Read/Write pin.
5. For a 'decoder with enable', input A is in pin-6, B is in pin-5, output D0 is in pin-4, D1 is in pin-3, D2 is in pin-2, D3 is in pin-1 and Enable is in pin-8
6. Click on the 'decoder with enable' component (in the Other Components drawer in the pallet) and then click on the position of the editor window where you want to add the component (no drag and drop, simple click will serve the purpose), likewise add 12 binary RAM cell (from the Other Components drawer in the pallet), 9 OR gates (from Logic Gates drawer in the pallete), 7 bit switches (which will toggle its value with a double click), 3 bit displays (from Display and Input drawer of the pallet,if it is not seen scroll down in the drawer)
7. To connect any two components select the Connection menu of Palette, and then click on the Source terminal and click on the target terminal. According to the circuit diagram connect all the components, connect 2 bit switches to the inputs of the 'decoder with enable' (which will act as address input), 1 bit switch to the enable pin of the 'decoder with enable' (which will act as memory enable input), connect a bit switch to the Read/Write(R/W') line, 3 bit switches to the data inputs line, 3 bit displays to the data output line and OR gates according to the diagram shown in the circuit diagram. after athe connection is over click the selection tool in the pallete.
8. To see the circuit working, Do some read or write operation by properly setting the R/W', memory enable then give input and check the output. suppose you give, R/W'=1, memory enable=1, address input=01, data input=101, then it will be a read operation and you will not see 101 as output, it will store 101 in the word-1. now again set, R/W'=0, memory enable=1, address input=01, then it will be a write operation and you will see 101 as the content of word-1 on the output display.

Circuit Diagram

Click here to download the older version of simulator

Click here to download the new version of simulator

OR

Launch the older version of Simulator

Launch the new version of Simulator

Once the simulator is downloaded, open the command prompt, then go to the directory where you have saved it using cd command and then give the following command to run the simulator:
java -jar coaSimulator.jar

1. Start the simulator as directed.
2. To design the circuit we need 12 binary RAM cell, 9 OR gate, 7 bit switch(to give input), 3 Bit display(to see the output), wires.
3. The pin configuration of a component is shown whenever the mouse is hovered on any canned component of the palette. Pin numbering starts from 1 and from the bottom left corner(indicating with the circle) and increases anticlockwise.
4. For a binary RAM cell input is in pin-5, output is in pin-4 and select is pin-8, Read/Write is in pin-6, for read operation give 1 input to Read/Write pin. For write operation give 0 input to Read/Write pin.
5. For a 'decoder with enable', input A is in pin-6, B is in pin-5, output D0 is in pin-4, D1 is in pin-3, D2 is in pin-2, D3 is in pin-1 and Enable is in pin-8
6. Click on the 'decoder with enable' component(in the Other Components drawer in the pallet) and then click on the position of the editor window where you want to add the component(no drag and drop, simple click will serve the purpose), likewise add 12 binary RAM cell(from the Other Components drawer in the pallet), 9 OR gates(from Logic Gates drawer in the pallete), 7 bit switches(which will toggle its value with a double click), 3 bit displays(from Display and Input drawer of the pallet,if it is not seen scroll down in the drawer)
7. To connect any two components select the Connection menu of Palette, and then click on the Source terminal and click on the target terminal. According to the circuit diagram connect all the components, connect 2 bit switches to the inputs of the 'decoder with enable'(which will act as address input), 1 bit switch to the enable pin of the 'decoder with enable'(which will act as memory enable input), connect a bit switch to the Read/Write(R/W') line, 3 bit switches to the data inputs line, 3 bit displays to the data output line and OR gates according to the diagram shown in the circuit diagram. after athe connection is over click the selection tool in the pallete.
8. To see the circuit working, Do some read or write operation by properly setting the R/W', memory enable then give input and check the output. suppose you give, R/W'=1, memory enable=1, address input=01, data input=101, then it will be a read operation and you will not see 101 as output, it will store 101 in the word-1. now again set, R/W'=0, memory enable=1, address input=01, then it will be a write operation and you will see 101 as the content of word-1 on the output display.

Circuit Diagram

Click here to download the older version of simulator

Click here to download the new version of simulator

OR

Launch the older version of Simulator

Launch the new version of Simulator

Once the simulator is downloaded, open the command prompt, then go to the directory where you have saved it using cd command and then give the following command to run the simulator:
java -jar Simulator.jar

Experiment-3 (Design of Registers and Counters) :

The web interface of the application is under development, so screenshots of the experiments are presented here.

This application is completely run under the platform independent editor frame.

As the clock input is under development, the complete simulation of registers and counters are not possible yet.

Screenshot of Experiment-3 (platform independent)

Design of Memory :

References :

Books:

1. Computer Organization and Architecture - William Stallings
2. Computer System Architecture - M. Morris Mano
3. Computer Architecture and Organization - John P. Hayes
4. Digital Logic and Computer Design - M. Morris Mano. Pearson Education - Prentice Hall.
5. Digital Principles Foundation of Circuit Design and Application - Arun Kumar Singh. New Age Publishers.
6. The Art of Electronics - Paul Horowitz and Winfield Hill (1989). Cambridge University Press
7. Modern Dictionary of Electronics - Rudolf F. Graf (1999). Newnes

Web Sites:

• NPTEL (e-learning courses from IITs and IISC)

Virtual Lab is an initiative of Ministry of Human Resource and Development(MHRD) under National Mission of Education through ICT to provide an interactive environment over the internet for creating and conducting different laboratory experiments by sharing the costly equipments and the resources.

For more information about the Virtual Lab,please visit http://www.vlab.co.in/

Developers of Logic Design and Computer Organization Virtual Lab

• Dr. Chittaranjan Mandal
Professor, Computer Science & Engineering
Professor, Information Technology
IIT Kharagpur
• Gargi Roy
Senior Project Assistant
• Devleena Ghosh

Target Audience:

Under graduate students.

Courses Aligned With:

Digital Logic and Computer organizatione.

Pre-requisite Softwares:

• 32 bit java runtime environment and java 1.6 or above
• Recommended browser: mozilla firefox, google chrome

Feedback:

To give your feedback please visit the following link-

Sponsered by MHRD (NME-ICT) .

Tutorial on UI for lab:

Introduction:

1. The simulator contains a pallete on the right hand side. This pallete contains all the components and tools . Tools are used to act up on the components. Different tools:
   • Selection tool- used for selecting components
   • Marquee tool- used for selecting many components at a time by draggiung the mouse in the design area(editor).
   • Connection tool- used for connecting components
2. Components have been catagorized according to their functionality and put into different drawers in the pallete. The area under every drawer is scrallable, if you are unable to see all the components in a particular drawer just click on the area and scroll. Different drawers:
• Circuits- contains 8 and 16 terminal circuits and flow container which can hold other circuit components.
• Logic gates- contains all kinds of basic logic gates.
• Display and inputs- contains all kinds of component needed to give input to the circuit and displaying outputs of the circuit.
• Adders- contains different types of adder circuits.
• Sequential ckt- contains basic flipflops for designing sequential circuits.
• Other Components- contains different kinds of components like decoders, multiplexers, arithmetic logic units(ALU), memory elements(RAM cell) required to design combinational circuits.
3. To add the components to the editor select any component(first click on the selection tool then click on the desired compoent) then finally click on the position of the editor window where you want to add the component.
4. The pin configuration of a component is shown whenever the mouse is hovered on any canned component of the palette. Pin numbering starts from 1 and from the bottom left corner(indicating with the circle) and increases anticlockwise.
5. To connect any two components select the Connection tool in the palette, and then click on the Source terminal and click on the target terminal(no drag and drop, simple click will serve the purpose). After the connection is over click the selection tool in the pallete.
6. To move any components select the Selection Mode and drag the component after selecting it.
7. If needed select any component in the editor while designing your circuit and use Undo, Redo, Delete, Zoom in, Zoom out buttons to get corresponding functionalities. Open and Save options are under development.
8. As the automated clock is under development and the simulator is under modification for sequencial circuits, for the time being please use individual clock(Bit switch which toggle its value with a double click) for each flipflop.
9. The simulator is currently under modification for sequential circuits, now it is working properly for combinational circuits but may not give proper output for sequential circuits.

Description of Components:

1. Digital display: it can be used to give input and as well as to see the output in the decimal format, its right most terminal is the LSB(least significant bit) and the left most terminal is the MSB(most significant bit), in the editor after selecting a particular digital display you can use 'Increment LED' and 'Decrement LED' buttons in the top left corner of the simulator to increment and decrement its value respectively.
2. Bit display: it displays a single bit value.
3. V+: it gives 1 as input.
4. Ground: it gives 0 as input.
5. Bit switch: it gives 1/0 input, it toggels its value with a double click.

Testing process:

1. To test your circuit give some input(through Digital display or Bit switch or V+ or Ground), if you use the Digital display or Bit switch you can then give different input to you circuit through incrementing/decrementing the Digital display or double clicking the Bit switch, the other two gives constant inputs.
2. to see the output, connect Digital display or Bit display to the output terminals of your circuit.

Frequently Asked Questions:

What is virtual lab?

The Virtual Laboratory is an interactive environment for creating and conducting simulated experiments: a playground for experimentation. It consists of domain dependent simulation programs, experimental units called objects that encompass data files, tools that operate on these objects.

What are the advantages of virtual lab?

Virtual Logic Design and Computer Organization lab enables students to perform FPGA based prototyping of experiments with support of a virtual environment. The primary need for virtualisation here is multifold.

1. Digital Logic and Computer Organisation are core courses in most of the Undergraduate Curricula of the entire Electrical Sciences Discipline ( Computer Science / Engg., Electronics, Electrical ] etc.
2. Many colleges/institutes cannot procure sufficient number of FPGA boards for their students.
3. Even when such FPGA boards are available, making them available round the clock is difficult.
4. Expert help is required to effectively use these FPGA boards and such help can be easily channeled through a virtual environment.
5. Helps to standardize the set of Experiments to a large extent.

What is eclipse platform?

Eclipse is a Java-based, extensible open source development platform. By itself, it is simply a framework and a set of services for building a development environment from plug-in components. Eclipse comes with a standard set of plug-ins, including the Java Development Tools (JDT).

Which framework is used to develop the application?

We have used the eclipse gef framework. The Graphical Editing Framework (GEF) allows developers to take an existing application model and quickly create a rich graphical editor.

What is platform independent application?

Applications that run under particular operating systems and/or particular hardwares are called platform dependent application whereas platform independent applications can run in any operating environment.

What are the experiments which can be performed by the Virtual Logic Design and Computer Organization lab?

The experiments that will be supported by this lab are given below:

1. Design of a ripple carry adder
2. Design of a carry-look-ahead adder
3. Design of registers and counters
4. Design of a wallace tree adder
5. Design of combinational multipliers
6. Design of a Booth’s multiplier
7. Design of an ALU
8. Design of memory units
9. Design of direct mapped cache
10. Design of associative cache
11. Design of combinational dividers
12. CPU design