Virtual Lab - IIT Kharagpur

CPU Design :

At the top level a computer consists of a CPU (central processing unit), memory, I/O components, with one or more modules of each type. These modules are interconnected in a specific manner to achieve the basic functionality of a computer i.e. executing programs. At the top level a computer system can be described as followes:

• describing the external behavior of each component i.e the data and the control signals that ir exchanges with other components
• describing the interconnection structure and the controls required

We are considering the Von Neumann architecture. Some of the basic features of this architecture are as follows:

• data and instructions are stored in a single read-write memory
• the contents of the memory are addressable by location
• execution occurs in a sequential manner (unless explicitly specified) from one instruction to the next

Top level components and interactions among them:

• CPU exchanges data with memory. For this CPU uses two internal resisters. Following is a block diagram of a basic computer system:

  
  
  
  • Memory address register (MAR) which specifies the address for the next read or write
  • Memory buffer register (MBR) which contains the data to be written into memory or receives the data read from memory
  • I/O buffer (I/O BR) register is used for the exchange of data between an I/O module and the CPU
• A memory module consists of a set of a locations defined by sequentially numbered addresses. Each location contains a binary number that cam be interpreted as either an instruction or data.
• An I/O module transfers data from external devices to CPU and memory and vise versa
• The basic function of a computer is to execute a program which consists of a set of instructions stored in the memory. Processing required for a single instruction is called an instruction cycle which consists instruction fetch and instruction execute. A register called program counter (PC) holds the address of the next instruction. Unless told otherwise the processor always increments PC after each instruction fetch so that the next instruction is fetched in sequence. The fetched instruction is fetched into a register called instruction register (IR).

  The basic instruction cycle is shown in the following figure:

  
• After fetching an instruction, processor execute the instruction by doing some processing on the data which may involve arithmetic and logic unit (ALU), specified by the instruction, then processor writes back the result (if any) to the memory.

This experiment provides a single instruction CPU with built-in controller. A working memory has been provided to check the working principle of the CPU. The single instruction which this CPU supports is SBN (subtract and branch if negative). The format of this instruction is:

• SBN a,b,c   Mem[a] = Mem[a] - Mem[b]   if(Mem[a] < 0) goto  c
• a,  b,  c are 4 bit addresses
• Mem[a] denotes the contents of memory address a

In this experiment, no I/O module has been included for the purpose of simplicity. The working memory should contain the programm and data in binary format. The CPU executes the programm. For halting, it uses self loop, no other halt instruction is provided.

CPU Design :

Basic stage

Multiple choice questions:

• The program controller of digital computer works

Synchronously

Progressively

Asynchronously

At random

---

The minimum time delay required between initiation of two successive memory operations is called

Transmission time

Memory access time

Memory cycle time

Fetch Time

---

• General purpose internal registers are also called

Stack

Address register

Status register

Scratch pad

---

• The refreshing rate of dynamic RAMs is approximately once in

Fifty milli seconds

Two micro seconds

Two milli seconds

Two micro seconds

---

• Microprogramming is designing of

ALU

Control unit

CPU

None of these

---

Subjective questions:

• What is a stored program computer?
• What general catagories of functions are specified by computer instructions?
• What are the possible states that define the instruction execution?
• What is wired AND operation?

Advanced stage

Multiple choice questions:

• How many units in a single bus structure can communicate at a time?

4

3

2

1

---

• A single bus structure is found in generally

Main frames

Super computers

Mini-and-micro computers

High performance machines

---

• What is the advantage of memory interfacing?

Effective speed of the memory is increased

A large memory is obtained

The cost of the memory is reduced

A volatile memory is obtained

---

• During read operation what is fetched by the CPU?

Only instruction

Only data

Only address

All of the above

---

• The technique which repeatedly uses the same block of internal storage during different stage of problem is called

Swapping

overlapping

Overlay

None of these

---

• In a computer, the larger RAM increases the speed, because it reduces

Disk I/Os

Need for external memory

Need for a data-wide path

None of these

---

Subjective questions:

• What is the maximum memory address space that the processor can access directly if it is connected to a 16-bit memory address?
• What are the main components of any general purpose computer?
• What is the advantage of multiple-bus architecture rather than using single-bus architecture?

CPU Design:

Procedure to perform the experiment:CPU Design

1. Start the simulator as directed.This simulator supports 5-valued logic.
2. To perform the experiment on the given modules, we need the CPU, the working memory with a program and data loaded, a clock input, Bit switch(to give input,which will toggle its value with a double click), Bit displays(for seeing output), wires.
3. Load memory: click on the load memory button in the left pane. you can either load the memory by filling the form or you can directly load the program form a text file. The memory provides 4-bit address space and 12 bit data word, thus providing 16 memory address starting from 0000 to 1111. For loading from file, the file should contain only binary values, it must contain 16 lines, each line containing the content to be stored in the corresponding memory address. For example, content of first line will be loaded to the 0000 address of the memory, similarly, the second line will correspond to the 0001 address and so on, finally the content of last line will be fed to the 1111 address. The progrm should use self loop for halting, for example, the instruction stored at address 1010 will cause self loop execution, if it content of a has -1 in binary format (in 2's complement), the content of b has 0 and c is 1010, then once the execution reaches to this 1010 address, it will finally point to itself.
4. Instantiating the memory: after loading the memory, click on the memory component from the computer design drawer in the palette of the simulator then click on the position of the design editor where you want to put the component(no drag and drop, simple click will serve the purpose).
5. The pin configuration of the component is shown whenever the mouse is hovered on any canned component of the palette or pressing the show pin configuration button on the toolbar will show it constantly in the left pane. Pin numbering starts from 1 and from the bottom left corner(indicating with the circle) and increases anticlockwise.
6. Pin configuration of the memory module:
   • Input pins (upper terminals): memory enable : 30, R/W' : 29, address : 25-28, data : 13-24 (13 is LSB)
   • Output pins(lower terminals): data output : 1-12 (1 is MSB)
7. Instantiate the CPU from the computer design drawer in the palette of the simulator then click on the position of the design editor where you want to put the component.
8. Pin configuration of the CPU:
   • Input pins (upper terminals): data input : 20-31 (20 is MSB) ,clock input : 19
   • Output pins(lower terminals): memory enable : 1, R/W' : 2, address : 3-6( 3 is MSB), data output : 7-18 (7 is MSB)
9. To connect any two components select the Connection menu of Palette, and then click on the Source terminal and click on the target terminal. According to the following diagram connect all the components. Connect the memory outputs to the input terminals of the CPU, specified datapath outputs to the inputs of the controller, the clock input, Bit switches with the inputs and Bit displays component with the outputs (from Display and Input drawer of the pallet,if it is not seen scroll down in the drawer). After the connection is over click the selection tool in the pallete.
10. Start clock and observe the behavior of the CPU.See the content of memory by clicking show memory button in the left pane. Observe how the program is executing sequentially and modify the data content as per the program.

    

Objective of CPU design:Our main objective for this experiment is to show the basic top level functionality, organization and architecture of a computer.This top level structure and function of a basic computer is important because of its explanatory power in understanding the nature of a computer. A grasp on these basic structure and functionality will provide insight into system bottolnecks, alternative pathways. Because in many cases, requirement of greater system power and fail-safe capabilities are achieved by changing the system design rather than changing the speed and reliability of individual components. So we have designed a single instruction CPU which contains a controller. A working memory has been given to examine the behavior of the CPU. The memory will contain the program in binary format which will be executed by the CPU. Through this, students can observe the behavior of a basic CPU and as well as a computer. The I/O modules have not been included in the system for the purpose of symplicity.

Recommended learning activities for the experiment: Leaning activities are designed in two stages, a basic stage and an advanced stage. Accomplishment of each stage can be self-evaluated through the given set of quiz questions consisting of multiple type and subjective type questions. In the basic stage, it is recommended to perform the experiment firstly, on the given encapsulated working module, secondly, on the module designed by the student, having gone through the theory, objective and procuder. By performing the experiment on the working module, students can only observe the input-output behavior. Where as, performing experiments on the designed module, students can do circuit analysis, error analysis in addition with the input-output behavior. It is recommended to perform the experiments following the given guideline to check behavior and test plans along with their own circuit analysis. Then students are recommended to move on to the advanced stage. The advanced stage includes the accomplishment of the given assignments which will provide deeper understanding of the topic with innovative circuit design experience. At any time, students can mature their knowledge base by further reading the references provided for the experiment.

color configuration of wire for 5 valued logic supported by the simulator:

• if value is UNKNOWN, wire color= maroon
• if value is TRUE, wire color= blue
• if value is FALSE, wire color= black
• if value is HI IMPEDENCE, wire color= green
• if value is INVALID, wire color= orange

Test plan :

Load the memory according to the following figure, then start clock and observe the behavior of the CPU. See the content of memory by clicking show memory button in the left pane. Observe how the program is executing sequentially and modify the data content as per the program.

Assignment Statements :

1. Design a single instruction CPU
2. Design a CPU with more instructions

CPU Design::

General guideline to use the simulator for performing the experiment:

• Start the simulator as directed. For more detail please refer to the manual for using the simulator
• To add the logic components to the editor or canvas (where you build the circuit) select any component and click on the position of the canvas where you want to add the component
• The pin configuration is shown when you select the component and press the 'show pinconfig' button in the left toolbar or whenever the mouse is hovered on any canned component of palette
• To connect any two components select the connection tool of palette, and then click on the source terminal and then click on the the target terminal
• To move any component select the component using the selection tool and drag the component to the desired position
• To give a toggle input to the circuit, use 'Bit Switch' which will toggle its value with a double click
• Use 'Bit Display' component to see any single bit value. 'Digital Display' will show the output in digital format
• undo/redo, delete, zoom in/zoom out, and other functionalities have been given in the top toolbar for ease of circuit building
• Use start/stop clock pulse to start or stop the clock input of the circuit. Clock period can be set from the given 'set clock' button in the left toolbar
• Use 'plot graph' button to see input-output wave forms
• Users can save their circuits with .logic extension and reuse them
• After building the circuit press the simulate button in the top toolbar to get the output
• If the circuit contains a clock pulse input, then the 'start clock' button will start the simulation of the whole circuit. Then there is no need to again press the 'simulate' button
• If you are using linux platform then click on 'Linux(32 bit)' or if you are using then click on 'Windows(32 bit)'

If you are using linux platform then click on 'Linux(32 bit)' or if you are using then click on 'Windows(32 bit)'

Linux(32 bit)

Windows(32 bit)

A basic computer:

Back

A basic computer:

Back

Click here to download the older version of simulator

Click here to download the new version of simulator

OR

Launch the older version of Simulator

Launch the new version of Simulator

Once the simulator is downloaded, open the command prompt, then go to the directory where you have saved it using cd command and then give the following command to run the simulator:
java -jar coaSimulator.jar

Click here to download the older version of simulator

Click here to download the new version of simulator

OR

Launch the older version of Simulator

Launch the new version of Simulator

Once the simulator is downloaded, open the command prompt, then go to the directory where you have saved it using cd command and then give the following command to run the simulator:
java -jar Simulator.jar

CPU Design :

References :

Books:

1. Computer Organization and Architecture - William Stallings
2. Computer System Architecture - M. Morris Mano
3. Computer Architecture and Organization - John P. Hayes
4. Digital Logic and Computer Design - M. Morris Mano. Pearson Education - Prentice Hall.
5. Digital Principles Foundation of Circuit Design and Application - Arun Kumar Singh. New Age Publishers.
6. The Art of Electronics - Paul Horowitz and Winfield Hill (1989). Cambridge University Press
7. Modern Dictionary of Electronics - Rudolf F. Graf (1999). Newnes

Web Sites:

• NPTEL (e-learning courses from IITs and IISC)

Virtual Lab is an initiative of Ministry of Human Resource and Development(MHRD) under National Mission of Education through ICT to provide an interactive environment over the internet for creating and conducting different laboratory experiments by sharing the costly equipments and the resources.

For more information about the Virtual Lab,please visit http://www.vlab.co.in/

Developers of Logic Design and Computer Organization Virtual Lab

• Dr. Chittaranjan Mandal
Professor, Computer Science & Engineering
Professor, Information Technology
IIT Kharagpur
• Gargi Roy
Senior Project Assistant
• Devleena Ghosh

Target Audience:

Under graduate students.

Courses Aligned With:

Computer organization and artitecture.

Pre-requisite Softwares:

• 32 bit java runtime environment and java 1.6 or above
• Recommended browser: mozilla firefox, google chrome

Objectives:

The Objective is to Expose the students to the various key aspects of Logic Design and Computer Organisation by enabling them to perform FPGA based prototyping of experiments with support of a virtual environment. The primary need for virtualisation here is multifold.

1. Digital Logic and Computer Organisation happens to be a Core Course in most of the Undergraduate Curricula of the entire Electrical Sciences Discipline(Computer Science / Engg., Electronics, Electrical) etc.
2. Many colleges/institutes cannot procure sufficient number of FPGA boards for their students.
3. Even when such FPGA boards are available, making them available round the clock is difficult.
4. Expert help is required to effectively use these FPGA boards and such help can be easily channeled through a virtual environment.
5. Helps to standardize the set of Experiments to a large extent.

Feedback:

To give your feedback please visit the following link-

Sponsered by MHRD (NME-ICT) .

Tutorial on UI for lab:

Introduction:

1. The simulator contains a pallete on the right hand side. This pallete contains all the components and tools . Tools are used to act up on the components. Different tools:
   • Selection tool- used for selecting components
   • Marquee tool- used for selecting many components at a time by draggiung the mouse in the design area(editor).
   • Connection tool- used for connecting components
2. Components have been catagorized according to their functionality and put into different drawers in the pallete. The area under every drawer is scrallable, if you are unable to see all the components in a particular drawer just click on the area and scroll. Different drawers:
• Circuits- contains 8 and 16 terminal circuits and flow container which can hold other circuit components.
• Logic gates- contains all kinds of basic logic gates.
• Display and inputs- contains all kinds of component needed to give input to the circuit and displaying outputs of the circuit.
• Adders- contains different types of adder circuits.
• Sequential ckt- contains basic flipflops for designing sequential circuits.
• Other Components- contains different kinds of components like decoders, multiplexers, arithmetic logic units(ALU), memory elements(RAM cell) required to design combinational circuits.
3. To add the components to the editor select any component(first click on the selection tool then click on the desired compoent) then finally click on the position of the editor window where you want to add the component.
4. The pin configuration of a component is shown whenever the mouse is hovered on any canned component of the palette. Pin numbering starts from 1 and from the bottom left corner(indicating with the circle) and increases anticlockwise.
5. To connect any two components select the Connection tool in the palette, and then click on the Source terminal and click on the target terminal(no drag and drop, simple click will serve the purpose). After the connection is over click the selection tool in the pallete.
6. To move any components select the Selection Mode and drag the component after selecting it.
7. If needed select any component in the editor while designing your circuit and use Undo, Redo, Delete,Zoom in, Zoom out buttons to get corresponding functionalities. Open and Save options are under development.
8. As the automated clock is under development and the simulator is under modification for sequencial circuits, for the time being please use individual clock(Bit switch which toggle its value with a double click) for each flipflop.
9. The simulator is currently under modification for sequential circuits, now it is working properly for combinational circuits but may not give proper output for sequential circuits.

Description of Components:

General components:

1. Digital display: it can be used to give input and as well as to see the output in the decimal format, its right most terminal is the LSB(least significant bit) and the left most terminal is the MSB(most significant bit), in the editor after selecting a particular digital display you can use 'Increment LED' and 'Decrement LED' buttons in the top left corner of the simulator to increment and decrement its value respectively.
2. Bit display: it displays a single bit value.
3. V+: it gives 1 as input.
4. Ground: it gives 0 as input.
5. Bit switch: it gives 1/0 input, it toggels its value with a double click.

Specific components:

Testing process:

1. To test your circuit give some input(through Digital display or Bit switch or V+ or Ground), if you use the Digital display or Bit switch you can then give different input to you circuit through incrementing/decrementing the Digital display or double clicking the Bit switch, the other two gives constant inputs.
2. to see the output, connect Digital display or Bit display to the output terminals of your circuit.

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Frequently Asked Questions:

What is virtual lab?

The Virtual Laboratory is an interactive environment for creating and conducting simulated experiments: a playground for experimentation. It consists of domain dependent simulation programs, experimental units called objects that encompass data files, tools that operate on these objects.

What are the advantages of virtual lab?

Virtual Logic Design and Computer Organisation lab enables students to perform FPGA based prototyping of experiments with support of a virtual environment. The primary need for virtualisation here is multifold.

1. Digital Logic and Computer Organisation happens to be a Core Course in most of the Undergraduate Curricula of the entire Electrical Sciences Discipline ( Computer Science / Engg., Electronics, Electrical ] etc.
2. Many colleges/institutes cannot procure sufficient number of FPGA boards for their students.
3. Even when such FPGA boards are available, making them available round the clock is difficult.
4. Expert help is required to effectively use these FPGA boards and such help can be easily channeled through a virtual environment.
5. Helps to standardize the set of Experiments to a large extent.

What is eclipse platform?

Eclipse is a Java-based, extensible open source development platform. By itself, it is simply a framework and a set of services for building a development environment from plug-in components. Eclipse comes with a standard set of plug-ins, including the Java Development Tools (JDT).

Which framework is used to develop the application?

We have used the eclipse gef framework. The Graphical Editing Framework (GEF) allows developers to take an existing application model and quickly create a rich graphical editor.

What is platform independent application?

Applications that run under particular operating systems and/or particular hardwares are called platform dependent application whereas platform independent applications can run in any operating environment.

What are the experiments which can be performed by the Virtual Logic Design and Computer Organization lab?

The experiments that will be supported by this lab are given below:

1. Design of a ripple carry adder
2. Design of a carry-look-ahead adder
3. Design of registers and counters
4. Design of a wallace tree adder
5. Design of combinational multipliers
6. Design of a Booth’s multiplier
7. Design of an ALU
8. Design of memory units
9. Design of direct mapped cache
10. Design of associative cache
11. Design of combinational dividers
12. CPU design