Funding and Publications

The laboratory has been working with both industrial and academic partners. Apart from being funded by the Department of Information Technology and Department of Science and Technology, India, we also have support from several Industrial collaborators spanning from Government houses, like DRDO labs (SAG, CAIR, Anurag), ISRO etc. to private organizations, like NTT Labs Japan, National Semiconductors (now Texas Instruments), Chaologix, Qualcomm etc. We collaborate with several leading groups in Hardware Security, like K.U.Leuven, Belgium, TelecomParis Tech, France, NYU-Poly, USA, Case Western Reserve, USA, Georgia Institute of Technology, USA on several topics and have been publishing in leading forums in Hardware Security, like CHES, FDTC, DAC, DATE, HOST, VLSID, Reconfig, Indocrypt, Africacrypt, Journal of Cryptographic Engineering, Springer and IEEE Transactions on Information Forensics, VLSI, Computers, Circuits and Systems-I, CAD and other forums. The works have also been invited for book chapters on Fault Attacks, on Hardware IP protection, Digital Rights Management. The laboratory has produced several text books on the topics of Hardware Security and Side Channel Analysis namely, “Hardware Security: Design, Threats, and Safeguards”, and “Timing Channels in Cryptography”,