1. Capability to perform side channel analysis, like power, faults, cache timing analysis, etc.

  2. Capability to perform state of the art VLSI design of complex cryptographic algorithms and prototyping on FPGAs.

  3. Capability to design PUF primitives which are lightweight primitives and resistant against side channel analysis and model building attacks.

  4. Capability to design lightweight block Ciphers.

  5. Capability to design countermeasures against side channel analysis.