Santosh Ghosh

 

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My research interests include :

 

v  Cryptography and security : Cryptography is the most promising area of research for providing security in electronic world. Designing proper security protocol and its efficient implementation in respective applications are the most challenging tasks in this regard. One of the outcomes of my research in this regard is the following article.

 

1.       Santosh Ghosh and Dipanwita Roy Chowdhury. Elliptic Curve Based Multi-signature Scheme for Multi-server Systems. IEEE Tencon 2008, Hyderabad, India, November 2008.

  

v  Hardware for cryptography and security : The hardware architectures for cryptographic applications need to have additional properties so that the implementation itself does not provide any unwanted information to the attackers. Therefore, special cares are necessarily taken while designing architecture for an algorithm in this area. Towards this area of research my contributions are described in following publications.

 

1.       Santosh Ghosh. Implementation of Public Key Cryptosystems Resistant against Side Channel Attacks. Master’s thesis.  pdf

2.       Santosh Ghosh, Monjur Alam, Dipanwita Roy Chowdhury, and Indranil Sen Gutpa. Parallel Crypto-devices for GF(p) Elliptic Curve Multiplication Resistant against Side Channel Attacks. Computers and Electrical Engineering, Elsevier, Vol. 35, pp. 329-338, 2009.

3.       Santosh Ghosh, Monjur Alam, Dipanwita Roy Chowdhury, and Indranil Sen Gutpa. A GF(p) Elliptic Curve Group Operator Resistant Against Side Channel Attacks. ACM Great Lakes Symposium on VLSI (GLSVLSI) 2008, Orlando, Florida, US, ACM, pp. 53-58, May 2008.

4.       Monjur Alam, Santosh Ghosh, Dipanwita Roy Chowdhury, and Indranil Sen Gutpa. Single Chip Encryptor/Decryptor Core Implementation of AES Algorithm. 21st International Conference on VLSI Design (VLSID 2008), Hyderabad, India, IEEE Computer Society, pp. 693-698, January 2008.

5.       Santosh Ghosh, Monjur Alam, Indranil Sen Gupta, and Dipanwita Roy Chowdhury. A Robust GF(p) Parallel Arithmetic Unit for Public Key Cryptography, 10th EUROMICRO Conference on Digital System Design - Architectures, Methods and Tools (DSD 2007), Lubeck, Germany, IEEE Computer Society, pp. 109-117, August 2007.

6.       Monjur Alam, Sonai Ray, Debdeep Mukhopadhyay, Santosh Ghosh, Dipanwita Roy Chowdhury, and Indranil Sen Gutpa. An Area Optimized Reconfigurable Encryptor for AES-Rijndael. Design Automation and Test in Europe (DATE 2007), Nice, France, IEEE Computer Society, pp. 1116-1121, April 2007.

 

v  Side-channel and fault analysis :  Attacks that are based on the unwanted information that are come out during the execution of a cryptographic algorithm are commonly known as side-channel attacks. The fault analysis on the other hand exploits the faulty outcomes of a cryptographic algorithm through fault injection. However the research contributions towards this area include how to mount an attack on an algorithm which runs on a specific platform and how to defend it. Towards this direction my contributions are listed here.

 

1.       Santosh Ghosh, Debdeep Mukhopadhyay, and Dipanwita Roy Chowdhury. Fault Attack and Countermeasures on Pairing Based Cryptography. To be appeared in International Journal of Network Security, Vol.12, No.1, pp. 26-33, Jan. 2011.

2.       Monjur Alam, Santosh Ghosh, M Jagon Mohan, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury, and Indranil Sen Gupta. Effect of Glitches Against Masked AES S-box Implementation and Countermeasure. Information Security (IFS), IET, Vol. 3, No. 1, pp. 34-44, 2009.

3.       Santosh Ghosh, Monjur Alam, Kundan Kumar, Debdeep Mukhopadhyay, and Dipanwita Roy Chowdhury. Preventing the Side-Channel Leakage of Masked AES S-Box. 15th International Conference on Advanced Computing & Communication (ADCOM 2007), IIT Guwahati, India, IEEE Computer Society, pp. 15-20, December 2007.

4.       Santosh Ghosh, Monjur Alam, Dipanwita Roy Chowdhury, and Indranil Sen Gupta, Effect of Side Channel Attacks on RSA Embedded Devices, IEEE Tencon 2007, Taipei, Taiwan, IEEE, pp. 1-4, November 2007.

5.       Santosh Ghosh, Dipanwita Roy Chowdhury, and Indranil Sen Gupta, Side Channel Attacks on RSA and ECC Crypto Devices, National Workshop on Cryptology 2007, Coimbatore, India, September 2007.

 

v  VLSI design and testing :  The VLSI design for various applications and testing the implemented chips are an evergreen area of research. The design automation is another branch of research in this regard. I have enormous interests to work for this area. Towards this interest I did two advanced courses during my masters program, which are

 

-          CAD for VLSI. Instructor was Professor P. P. Chakrabarti. I obtained an A grade.

-          Advanced Digital and Mixed Signal Testing. Instructor was Professor I. Sen Gupta. In this course I was the only person who obtained an Ex grade.

     

        However, due to the lack of scopes I do not have any significant publication in design automation and testing area.  Followings are my research outcomes in the VLSI design area.

 

1.       Santosh Ghosh and Avishek Saha. Speed-area optimized FPGA implementation for Full Search Block Matching. International Conference on Computer Design (ICCD 2007), IEEE Comp. Society, pp. 13-18, California, US, October 2007.

2.       Avishek Saha and Santosh Ghosh. A speed-area optimization of Full Search Block Matching hardware with applications in high-definition TVs (HDTV). High Performance Computing (HiPC 2007), LNCS 4873, pp. 83-94, Goa, India, December 2007.

3.       Avishek Saha, Santosh Ghosh, Shamik Sural, and Jayanta Mukherjee. Toward Memory-efficient Design of Video Encoders for Multimedia Applications. ISVLSI 2007, Porto Alegre, Brazil, IEEE Computer Society, pp. 453-454, May 2007.

 

 

 

For suggestions and comments:  Santosh Ghosh

Last modified on Mon, June 07, 2010 9:30 AM