Santosh Ghosh

 

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Thesis :

 

      1.      Santosh Ghosh. Design and Analysis of Pairing Based Cryptographhic Hardware  

               for Prime Fields. PhD Thesis.  pdf

2.      Santosh Ghosh. Implementation of Public Key Cryptosystems Resistant against Side Channel Attacks. Master’s thesis.  pdf

 

Journal :

 

1.       Santosh Ghosh, Debdeep Mukhopadhyay, and Dipanwita Roy Chowdhury, Petrel : Power and Timing Attack Resistant Elliptic Curve Scalar Multiplier Based on Programmable GF(p) Arithmetic Unit, IEEE Transactions on Circuits and Systems – I, Vol 58, No 9, pp.1-14, 2011.

2.       Santosh Ghosh, Debdeep Mukhopadhyay, and Dipanwita Roy Chowdhury. Fault Attack and Countermeasures on Pairing Based Cryptography. To be appeared in International Journal of Network Security, Vol.12, No.1, pp. 26-33, 2011.

3.       Santosh Ghosh, Monjur Alam, Dipanwita Roy Chowdhury, and Indranil Sen Gutpa. Parallel Crypto-devices for GF(p) Elliptic Curve Multiplication Resistant against Side Channel Attacks. Computers and Electrical Engineering, Elsevier, Vol. 35, pp. 329-338, 2009.

4.       Monjur Alam, Santosh Ghosh, M Jagon Mohan, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury, and Indranil Sen Gupta. Effect of Glitches Against Masked AES S-box Implementation and Countermeasure. Information Security (IFS), IET, Vol. 3, No. 1, pp. 34-44, 2009.

 

Conferences :

 

1.       Santosh Ghosh, Dipanwita Roy Chowdhury, and Abhijit Das. High Speed Cryptoprocessor for Eta Pairing on 128-bit Secure Supersingular Elliptic Curves over Characteristic Two Fields. CHES 2011, Nara, Japan, Sep. 2011.

2.       Santosh Ghosh. Design and Analysis of Pairing Hardware on FPGA Platform. PhD Forum DAC 2011, ACM, San Diego, US, June 2011.

3.       Santosh Ghosh. Design and Analysis of Pairing Based Cryptographic Hardware for Prime Fields. PhD Forum ISVLSI 2011, IEEE Computer Society, India, July 2011.

4.       Santosh Ghosh, Debdeep Mukhopadhyay, and Dipanwita Roy Chowdhury. High Speed Flexible Pairing Cryptoprocessor on FPGA Platform. 4th International Conference on Pairing-based Cryptography - Pairing 2010, Yamanaka Hot Spring, Japan, December 2010.

5.       Santosh Ghosh, Debdeep Mukhopadhyay, and Dipanwita Roy Chowdhury. High Speed Fp Multipliers and Adders on FPGA Platform. DASIP 2010, Edinburgh, Scotland, October 2010.

6.       Santosh Ghosh, Dipanwita Roy Chowdhury, and Indranil Sen Gutpa. The ECMQV Key Agreement Protocol on FPGA Platform. National Workshop on Cryptology 2009, Surat, India, August 2009.

7.       Santosh Ghosh and Dipanwita Roy Chowdhury. Elliptic Curve Based Multi-signature Scheme for Multi-server Systems. IEEE Tencon 2008, Hyderabad, India, November 2008.

8.       Santosh Ghosh and Dipanwita Roy Chowdhury. Configurable Multicore Processing Unit for Elliptic Curve Cryptography. VDAT 2008, Bangalore, India, July 2008.

9.       Santosh Ghosh, Monjur Alam, Dipanwita Roy Chowdhury, and Indranil Sen Gutpa. A GF(p) Elliptic Curve Group Operator Resistant Against Side Channel Attacks. ACM Great Lakes Symposium on VLSI – GLSVLSI- 2008, Orlando, Florida, US, ACM, pp. 53-58, May 2008.

10.    Monjur Alam, Santosh Ghosh, Dipanwita Roy Chowdhury, and Indranil Sen Gutpa. Single Chip Encryptor/Decryptor Core Implementation of AES Algorithm. 21st International Conference on VLSI Design - VLSID 2008, Hyderabad, India, IEEE Computer Society, pp. 693-698, January 2008.

11.    Santosh Ghosh, Monjur Alam, Kundan Kumar, Debdeep Mukhopadhyay, and Dipanwita Roy Chowdhury. Preventing the Side-Channel Leakage of Masked AES S-Box, 15th International Conference on Advanced Computing & Communication- ADCOM 2007, IIT Guwahati, India, IEEE Computer Society, pp. 15-20, December 2007.

12.    Avishek Saha and Santosh Ghosh. A speed-area optimization of Full Search Block Matching hardware with applications in high-definition TVs (HDTV). High Performance Computing - HiPC 2007, LNCS 4873, pp. 83-94, Goa, India, December 2007.

13.    Santosh Ghosh, Monjur Alam, Dipanwita Roy Chowdhury, and Indranil Sen Gupta. Effect of Side Channel Attacks on RSA Embedded Devices. IEEE Tencon 2007, Taipei, Taiwan, IEEE, pp. 1-4, November 2007.

14.    Santosh Ghosh and Avishek Saha. Speed-area optimized FPGA implementation for Full Search Block Matching. International Conference on Computer Design - ICCD 2007, IEEE Comp. Society, pp. 13-18, California, US, October 2007.

15.    Santosh Ghosh, Monjur Alam, Indranil Sen Gupta, and Dipanwita Roy Chowdhury. A Robust GF(p) Parallel Arithmetic Unit for Public Key Cryptography. 10th EUROMICRO Conference on Digital System Design - Architectures, Methods and Tools - DSD 2007, Lubeck, Germany, IEEE Computer Society, pp. 109-117, August 2007.

16.    Monjur Alam, Santosh Ghosh, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury, and Indranil Sen Gutpa, Latency Optimized AES-Rijndael with Flexible Mode of Operation, VDAT 2007, pp. 413-420, Kolkata, India, August 2007.

17.    Avishek Saha, Santosh Ghosh, Shamik Sural, and Jayanta Mukherjee. Toward Memory-efficient Design of Video Encoders for Multimedia Applications. ISVLSI 2007, Porto Alegre, Brazil, IEEE Computer Society, pp. 453-454, May 2007.

18.    Monjur Alam, Sonai Ray, Debdeep Mukhopadhyay, Santosh Ghosh, Dipanwita Roy Chowdhury, and Indranil Sen Gutpa. An Area Optimized Reconfigurable Encryptor for AES-Rijndael. Design Automation and Test in Europe (DATE 2007), Nice, France, IEEE Computer Society, pp. 1116-1121, April 2007.

19.    Santosh Ghosh, Dipanwita Roy Chowdhury, and Indranil Sen Gupta. Side Channel Attacks on RSA and ECC Crypto Devices, National Workshop on Cryptology 2007, Coimbatore, India, September 2007.

 

 

 

For suggestions and comments:  Santosh Ghosh

Last modified on Mon, June 20, 2011 9:30 AM