Date | Topics | Reference |
---|---|---|
02/01/20 | Introduction and course logistics. | |
06/01/20 | Number systems, inter-conversions between representations in various bases, (r-1)'s and r's complements, subtraction of unsigned numbers using complements. | |
08/01/20 | Various signed representations, addition and subtraction of signed numbers, switching algebra, identities, expressions, De Morgan's theorems, switching functions, canonical sum of products (and product of sum) representations. | |
09/01/20 | Shannon's expansion theorem, properties of XOR, functionally complete (universal) sets, propositional calculus, binary codes, weighted codes (BCD, 2420,642-3). | |
13/01/20 | The shift and add-3 algorithm (double-dabble algorithm) for converting binary to BCD. | |
15/01/20 | Self-complementing codes, cyclic codes, Gray code, Single error detecting codes: parity check and 2-out-of-5. | |
16/01/20 | Single error correction: Hamming code. Excess-3 code. | |
20/01/20 | Tutorial. | |
22/01/20 | Tutorial (contd.), Karnaugh map. | |
23/01/20 | Karnaugh map. | |
27/01/20 | Quine-McClauskey's method. | |
30/01/20 | Petrick's method. | |
03/02/20 | Branching method. | |
05/02/20 | Combinational circuits: comparator, decoder, encoder, priority encoder, multiplexer. | |
06/02/20 | Half-adder, full-adder, ripple carry adder, carry look-ahead adder. | |
10/02/20 | Multi-leve carry look-ahead adder, sequential design: serial adder, SR-latch. | |
12/02/20 | T-latch, JK-latch, D-latch, Master-slave fliop flop, 1's catching, edge-triggered flip-flop. Design of sequential circuits: sequence detector, binary counter. | |
13/02/20 | Sequential control unit design. | |
26/02/20 | Discussion of mid-sem paper. | |
27/02/20 | Tutorial. | |
02/03/20 | Tutorial (contd.), sequential circuits: recognizing string patterns, outputting 2's complement. | |
04/03/20 | Mealy and Moore machine and their equivalence, minimization of fully specified FSM. | |
05/03/20 | Registers with parallel load, ripple counters, synchronous up counter. | |
11/03/20 | Shift registers, serial transfer, serial addition, up-down and BCD counters. | |
-- | Barrel shifter | Lec1, Lec2, Lec3 |
-- | Asynchronous sequential circuits | Lec1, Lec2, Lec3 |
-- | Hazards | Lec1, Lec2, Lec3, Notes from Section-2, Hazard free minimization |
-- | Race | Lec1, Lec2, Slides from the University of Waterloo Slides for Lec1 Slides for Lec2 |
-- | Burst-mode synthesis | Lecture video Slides |
-- | Algorithmic State Machine | Lecture-1 Lecture-2 |