The work studies the group properties exhibited by Non-linear Cellular Automaton (NCA). The work describes a method to combine small non-linear, invertible machines with group linear Cellular Automaton (CA) to obtain large non-linear machines with predictable cyclic structures. We show with large number of experimental results that through proper choice of the rules of the linear CA we may obtain highly non-linear invertible mappings without affecting the group properties of the linear CA. We also study a class of non-linear CA, with OR-gates to realize their transition functions. In order to predict the group properties of the CA we develop a method using the graphical representation of its transition matrix. We prove that the graph of the transition matrix of an OR-NCA (OR based Non-linear CA) which forms a group does not have certain forbidden patterns. The proposed prediction of the group properties of the OR-NCA is much faster than an exhaustive simulation of the machine.
To satisfy the high throughput requirements of modern applications, complex cryptographic algorithms are implemented by means of either VLSI devices (crypto-accelerators) or highly optimized software routines (crypto-libraries). The high complexity of such implementations raises concerns regarding their reliability. Hence in this scenario it is imperative that the crypto-algorithms should not only prevent conventional cryptanalysis (attacks) but also should prevent the deduction of the keys from accidental faults or intentional intrusions. Such attacks are known as fault attacks and were first conceived in September 1996). Fault analysis have evolved to a very strong and effective form of attack and needs to be analyzed and countered suitably. Sensitive data stored on secure flash drives protected by modern day standard ciphers can be compromised using the power of these fault attacks. Less costly methods for fault injection, like variation of supply voltages, clock frequency, clock glitches or temperature variations may be explored as possible means of controlled induction of faults. With these findings the study of fault attacks against implementation of modern day ciphers becomes imperative. In these lines the present project may be broadly categorized into two parts:
- Developing and simulating fault attacks against ciphers. The prototype of the ciphers shall be carried on (Field Programmable Gate Array) FPGA platforms.
- Developing suitable counter-measures against the developed fault attacks.
The motivation of the present work comes for the fact that during the last decade we have witnessed a lot of development in the field of cryptography. On one hand many new algorithms and protocols were developed to protect and secure information. On the other hand many algorithms were written to attack them. This is an ongoing process. However cryptography remains a necessary evil and always a burden on the computation. Hence efficiency of the cryptographic algorithms is crucial. Another issue which has vastly gained importance in the recent days is Side Channel Attacks, like Timing Attacks, Cache Attacks, buffer overflow attacks etc. However the programmers implementing the crypto-algorithms are in general unaware of the performance aspect of the crypto-algorithms or their security vulnerabilities. The cryptographic softwares are generally writtent by users unaware of the dedicated mathematical libraries (like number theory libraries) or security implications of the codes. The focus of the proposed research is thus intended towards realizing a Cryptography Aware Compiler Tools for Users (CACTUS), in supplement to the conventional compilers.
Cryptographic hash functions have enormous utility in modern day secured transactions. Hash functions are necessary to provide integrity to the data, because of their unique property of being collision resistant. However with the development of collisions on modern day hash functions, like MD5, SHA-1 there is a search for a new standard in hash functions round the globe. NIST (US National Institute of Standards and Technology) is reviewing new proposals for hash functions to decide on new standards. Research is thus needed to develop new principles of hash function constructions, like the classical Merkle Damgard Construction and also analyze them for collisions. The present project aims at developing cryptanalytic tools and methods for present day and new generation hash functions.
Side Channel Analysis is a technique to analyze and attack implementations of Cryptographic algorithms exploiting the properties of their implementations. In our research we experiment on implementations of both public and symmetric key cryptosystems exploiting various side channels in the form of power, fault and scan chains. In our Department we have made laboratory set up for performing various kinds of statistical attacks based on the power consumption of the device. Such kinds of attacks, commonly named as "Power Attacks" are threatening as we observe that using a few hundred-thousand traces we are capable of ascertaining the secret key embedded in ciphers like DES (Data Encryption System), AES (Advanced Encryption Standard). Our research in this relevant topic (considering the fact that your credit cards are no more secure!) are as follows:
- Developing more efficient Power Analysis methods which requires even lesser number of power traces.
- Developing Power Attacks on other forms of ciphers, like Stream Ciphers in particular.
Scan Chains are a popular technique for Design-for-testability of ciphers. However the same mechanism can be exploited by attackers to cryptanalyze both block and stream ciphers. Thus we focus on finding new testing mechanisms for cryptographic hardware which are capable of resisting such kinds of attacks.