Side-channel attacks are considered as one of the biggest threats against modern crypto-systems. Various countermeasures have been proposed to make ciphers resistant against side-channel attacks. However, many of those countermeasures, instead of providing an absolute security, makes the attacks more difficult against the cipher. Though certain countermeasures provide full-proof resistance against side-channel attack, they also put a large overhead to the performance and area requirement of the implementation. This motivates the design of ciphers which are naturally resistant against side-channel attacks.
DRECON is a scheme to construct a block cipher with innate protection against differential power attacks (DPA). The scheme is motivated by tweakable block ciphers and is shown to be secure against first-order DPA (even in the presence of gliches in the circuit) using information theoretic metrics. DRECON is less expensive than masking and re-keying countermeasures from the implementation perspective and can be efficiently realized in both hardware and software platforms. On FPGAs especially, DRECON can optimally utilize the abundant block RAMs available and therefore have minimal overheads.
This is a joint work between
Department of Computer Science and Engineering, IIT Kharagpur, India and
SEN group, Telecom ParisTech, France.
We provide the encryption/decryption code for a DRECON implementation, using 8x8 S-Boxes. The S-Boxes are tweaked, and the
implementation is a serialized architecture.
The encryption code can be found here.(Encryption Code).
The decryption code can be found here.(Decryption Code).
DRECON: DPA Resistant Encryption by Construction