AES_Comp_DEC_Serial Project Status
Project File:	DRECON_AES.xise	Parser Errors:	No Errors
Module Name:	AES_Comp_DEC_Serial	Implementation State:	New
Target Device:	xc5vlx50-2ff324	Errors:
Product Version:	ISE 12.4	Warnings:
Design Goal:	Balanced	Routing Results:
Design Strategy:	Xilinx Default (unlocked)	Timing Constraints:
Environment:		Final Timing Score:

 

Detailed Reports						[-]
Report Name	Status	Generated	Errors	Warnings	Infos
Synthesis Report
Translation Report
Map Report
Place and Route Report
Power Report
Post-PAR Static Timing Report
Bitgen Report

 

Secondary Reports			[-]
Report Name	Status	Generated
ISIM Simulator Log	Current	Fri Jun 20 12:33:30 2014
WebTalk Report	Current	Sat May 31 21:42:26 2014
WebTalk Log File	Current	Sat May 31 21:42:28 2014

Date Generated: 06/26/2014 - 01:08:41