Introduction: review of basic computer architecture, quantitative techniques in computer design
Measuring and reporting performance. CISC and RISC processors.
Pipelining: Basic concepts, instruction and arithmetic pipeline, data hazards, control hazards, and structural hazards, techniques for handling hazards.
Exception handling. Pipeline optimization techniques.
Compiler techniques for improving performance.
Hierarchical memory technology: Inclusion, Coherence and locality properties;
Cache memory organizations, Techniques for reducing cache misses; Virtual memory organization
Mapping and management techniques, memory replacement policies.
Instruction-level parallelism: basic concepts, techniques for increasing ILP, superscalar, super-pipelined and VLIW processor architectures.
Array and vector processors.
Multiprocessor architecture: taxonomy of parallel architectures.
Centralized shared-memory architecture: synchronization, memory consistency, interconnection networks.
Distributed shared-memory architecture. Cluster computers.
Non von Neumann architectures: data flow computers, reduction computer architectures, systolic architectures.
Microprocessor Architecture, Jean Loup Baer
Computer Organization and Design, 4th Ed, D. A. Patterson and J. L. Hennessy
Computer Architecture, Berhooz Parhami
John L. Hennessy and David A. Patterson, Computer Architecture: A Quantitative Approach, Morgan Kaufmann.
John Paul Shen and Mikko H. Lipasti, Modern Processor Design: Fundamentals of Superscalar Processors, Tata McGraw-Hill.
M. J. Flynn, Computer Architecture: Pipelined and Parallel Processor Design, Narosa Publishing House.
Kai Hwang, Advanced Computer Architecture: Parallelism, Scalability, Programmability, McGraw-Hill.
Class Test : 20 marks
Mid Semester Examination : 30 marks
End Term Examination : 50 marks