PhD Publications:

Journals:

[J5]. Sudip Roy, Bhargab B. Bhattacharya, Sarmishtha Ghoshal and Krishnendu Chakrabarty, "A High-Throughput Dilution Engine for Sample Preparation on Digital Microfluidic Biochips", IET Computers & Digital Techniques (IET-CDT), September, 2013. Digital Object Identifier: 10.1049/iet-cdt.2013.0060.

[J4]. Sudip Roy, Bhargab B. Bhattacharya and Krishnendu Chakrabarty, "Optimization of Dilution and Mixing of Biochemical Samples using Digital Microfluidic Biochips", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 29(11), pp. 1696-1708, November, 2010. Digital Object Identifier: 10.1109/TCAD.2010.2061790.

Conferences/Workshops:

[C18]. Sudip Roy, Bhargab B. Bhattacharya, Sarmishtha Ghoshal and Krishnendu Chakrabarty, "Optimal Two-Mixer Scheduling in Dilution Engine on a Digital Microfluidic Biochip", Accepted for Publication in the Fourth International Symposium on Electronic System Design (ISED), December 12-13, 2013, Singapore.

[C17]. Sudip Roy, "Algorithms for Automatic Sample Preparation on Digital Microfluidic Biochips", poster presentation in the SELECTBIO International Conference Microfluidics and Lab-on-a-Chip India, September 27-28, 2013, Bangalore, India. (Best Poster Award by ePosters.net)

[C16]. Sudip Roy, Partha P. Chakrabarti, Srijan Kumar, Bhargab B. Bhattacharya and Krishnendu Chakrabarty, "Routing-aware resource allocation for mixture preparation in digital microfluidic biochips", in Proceedings of the IEEE International Symposium on VLSI (ISVLSI), August 5-7, 2013, Natal, Brazil.

[C15]. Sudip Roy, Bhargab B. Bhattacharya, Sarmishtha Ghoshal and Krishnendu Chakrabarty, "On-Chip Dilution from Multiple Concentrations of a Sample Fluid using Digital Microfluidics", in Proceedings of the Seventeenth International Symposium on VLSI Design and Test (VDAT), July 27-30, 2013, Jaipur, India.

[C14]. Srijan Kumar, Sudip Roy, Partha P. Chakrabarti, Bhargab B. Bhattacharya and Krishnendu Chakrabarty, "Efficient Mixture Preparation on Digital Microfluidic Biochips", in Proceedings of the Sixteenth IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), pp. 205-210, April 8-10, 2013, Karlovy Vary, Czech Republic. Digital Object Identifier: 10.1109/DDECS.2013.6549817

[C13]. Sudip Roy, Bhargab B. Bhattacharya, Sarmishtha Ghoshal and Krishnendu Chakrabarty, "Low-Cost Dilution Engine for Sample Preparation using Digital Microfluidic Biochips", in Proceedings of the Third International Symposium on Electronic System Design (ISED), pp. 203-207, December 19-22, 2012, Kolkata, India. Digital Object Identifier: 10.1109/ISED.2012.70.

[C12]. Sudip Roy, Partha P. Chakrabarti and Bhargab B. Bhattacharya, "Algorithms for On-Chip Solution Preparation using Digital Microfluidic Biochips", in Proceedings of the IEEE International Symposium on VLSI (ISVLSI), pp. 7-8, August 19-21, 2012, Amherst, USA. Digital Object Identifier: 10.1109/ISVLSI.2012.79.

[C11]. Sudip Roy, Bhargab B. Bhattacharya and Krishnendu Chakrabarty, "Waste-Aware Dilution and Mixing of Biochemical Samples with Digital Microfluidic Biochips", in Proc. IEEE/ACM Design, Automation and Test in Europe (DATE) Conference, pp. 1059-1064, March 14-18, 2011, Grenoble, France. Digital Object Identifier: 10.1109/DATE.2011.5763174.

[C10]. Sudip Roy, Bhargab B. Bhattacharya, Partha P. Chakrabarti and Krishnendu Chakrabarty, "Layout-Aware Solution Preparation for Biochemical Analysis on a Digital Microfluidic Biochip", in Proc. IEEE International Conference on VLSI Design (VLSID), pp. 171-176, January 2-7, 2011, Chennai, India. Digital Object Identifier: 10.1109/VLSID.2011.55.

Patents Filed (during tenure at ISI Kolkata):

[P3]. Bhargab B. Bhattacharya, Sudip Roy and Krishnendu Chakrabarty, "Dilution Method for Digital Microfluidic Biochips", Publication number: WO 2012/007788, Filing date: 13 November, 2010 [WIPO Link].

[P2]. Bhargab B. Bhattacharya, Sudip Roy and Krishnendu Chakrabarty, "Architectural Layout for Dilution with Reduced Wastage in Digital Microfluidic Based Lab-On-a-Chip ", Publication number: WO 2012/007787, Filing date: 12 November, 2010 [WIPO Link].

[P1]. Bhargab B. Bhattacharya, Sarmishtha Ghoshal, Sudip Roy and Krishnendu Chakrabarty, "High Throughput and Volumetric Error Resilient Dilution with Digital Microfluidic Based Lab-On-a-Chip", Publication number: WO 2012/007786, Filing date: 12 November, 2010 [WIPO Link].

Other Publications:

Book Chapter:

[B2]. Sarmishtha Ghoshal, Debasis Mitra, Sudip Roy and Dwijesh Dutta Majumder, "Chapter 9: Advance in Biosensors and Biochips", Modern Sensors, Transducers and Sensor Networks (Book Series: Advances in Sensors: Reviews, Vol. 1), Sergey Y. Yurish(ed.), ISBN:978-84-615-9012-4, pp. 9:1-9:33, International Frequency Sensor Association (IFSA) Publishing, May, 2012. [Link]

Journals:

[J3]. Sudip Roy, Debasis Mitra, Bhargab B. Bhattacharya and Krishnendu Chakrabarty, "Congestion-aware layout design for high-throughput digital microfluidic biochips", ACM Journal on Emerging Technologies in Computing Systems (JETC), Vol. 8, Issue 3, Article 17, August, 2012. Digital Object Identifier: 10.1145/2287696.2287700.

[J2]. Sarmishtha Ghoshal, Debasis Mitra, Sudip Roy and Dwijesh Dutta Majumder, "Biosensors and Biochips for Nanomedical Applications: a Review", Sensors & Transducers Journal (ISSN 1726-5479), International Frequency Sensor Association (IFSA), Vol. 113, Issue 2, pp. 1-17, February, 2010. [Link]

Conferences/Workshops:

[C9]. Bhargab B. Bhattacharya, Sudip Roy and Sukanta Bhattacharjee, "Algorithmic Challenges in Digital Microfluidic Biochips: Protocols, Design, and Test", Invited Paper for Publication in the International Conference on Applied Algorithms (ICAA), January 13-15, 2014, Kolkata, India.

[C8]. Debasis Mitra, Sudip Roy, Krishnendu Chakrabarty and Bhargab B. Bhattacharya, "On-Chip Sample Preparation with Multiple Dilutions Using Digital Microfluidics", in Proceedings of the IEEE International Symposium on VLSI (ISVLSI), pp. 314-319, August 19-21, 2012, Amherst, USA. Digital Object Identifier: 10.1109/ISVLSI.2012.52.

[C7]. Sudip Roy, Debasis Mitra, Bhargab B. Bhattacharya and Krishnendu Chakrabarty, "Pin-Constrained Designs of Digital Microfluidic Biochips for High-Throughput Bioassays", Proc. IEEE International Symposium on Electronic System Design (ISED), pp. 4-9, December 20-22, 2010, Bhubaneswar, India. Digital Object Identifier: 10.1109/ISED.2010.10.

[C6]. Sujan Kundu, Sudip Roy and Ajit Pal, "A Power-Aware Wireless Sensor Network Based Bridge Monitoring System", Proc. of 16th International Conference on Networks (ICON), pp. 1-7, December 12-14, 2008, New Delhi, India. Digital Object Identifier: 10.1109/ICON.2008.4772584.

[C5]. Sudip Roy, Indranil Sen Gupta and Ajit Pal, "Artificial Intelligence Approach to Test Vector Reordering for Dynamic Power Reduction during VLSI Testing", Proc. of IEEE Region 10 Conference (TENCON), November 18-21, 2008, Hyderabad, India. Digital Object Identifier: 10.1109/TENCON.2008.4766747.

MS Publications:

Book:

[B1]. Sudip Roy and Ajit Pal, "Impact of Leakage Power Reduction Techniques on Parametric Yield: Low-Power Design of Digital Integrated Circuits under Process Parameter Variations", , ISBN:978-3-659-27391-9, 172 pages, LAP Lambert Academic Publishing, January, 2013. [Link]

Journals:

[J1]. Sudip Roy and Ajit Pal, "A New Technique for Runtime Leakage Reduction and Its Sensitivity and Parametric Yield Analysis Under Effective Channel-Length Variation", Journal of Low Power Electronics (JOLPE), Vol. 6, No. 1, pp.80-92, April, 2010. [Link]

Conferences/Workshops:

[C4]. Sudip Roy and Ajit Pal, "Impact of Runtime Leakage Reduction Techniques on Delay and Power Sensitivity under Effective Channel Length Variations", Proc. of IEEE Region 10 Conference (TENCON), November 18-21, 2008, Hyderabad, India. Digital Object Identifier: 10.1109/TENCON.2008.4766400.

[C3]. Sudip Roy and Ajit Pal, "Why to Use Dual-Vt, If Single-Vt Serves the Purpose Better under Process Parameter Variations?", Proc. of 11th Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD), pp. 282-289, September 3-5, 2008, Parma, Italy. Digital Object Identifier: 10.1109/DSD.2008.37.

[C2]. Sudip Roy, Arundhati Jana and Ajit Pal, "Synthesis of DSP Circuits for Low Power using Multiple-Vdd, Gate-Level Sized and Optimal-Vt Library", Proc. of Fifth International Conference on Systemics, Cybernetics and Informatics (ICSCI), pp. 25-29, January 2-5, 2008, Hyderabad, India, and International Journal of Systemics, Cybernetics and Informatics (IJSCI) (ISSN 0973-4864), July, 2008.

[C1]. Sudip Roy and Ajit Pal, "Transistor Sizing with Optimal-Vt for Runtime Leakage Reduction and Less Sensitive Design under Leff Variations", Introductory Short Presentation in First International Workshop on Impact of Low-Power Design on Test and Reliability (LPonTR) - Fringe to IEEE ETS 2008, May 29, 2008, Lago Magiore, Italy.

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