This course introduces the principles of High Performance Computer Architecture.
It aims to teach you the foundational principles of Computer Architecture. The goal of this course is to give you a foundation for further study Computer Architecture and help you to better understand how can you design primitives to build high performing systems.
See the course schedule for details.
Prerequisites | We will use basic concepts from Computer Architecture to begin our course.
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Lectures | Lecture timings are: Monday 15:00 - 17:00 hrs Tuesday 14:00 - 16:00 hrs This semester all the classes will be conducted offline at Nalanda Classroom Complex, Room NR223. Please keep and eye on the Schedule page for the latest updates. |
Textbook | We will be using: 1. Microprocessor Architecture, Jean Loup Baer. 2. Computer Organization and Design, 4th Ed, D. A. Patterson and J. L. Hennessy. 3. Computer Architecture, Berhooz Parhami. 4. John L. Hennessy and David A. Patterson, Computer Architecture: A Quantitative Approach, Morgan Kaufmann. 5. John Paul Shen and Mikko H. Lipasti, Modern Processor Design: Fundamentals of Superscalar Processors, Tata McGraw-Hill. 6. M. J. Flynn, Computer Architecture: Pipelined and Parallel Processor Design, Narosa Publishing House. 7. Kai Hwang, Advanced Computer Architecture: Parallelism, Scalability, Programmability, McGraw-Hill. |
Detailed Syllabus |
1. Introduction: review of basic computer architecture, quantitative techniques in computer design. 2. Measuring and reporting performance. CISC and RISC processors. 3. Pipelining: Basic concepts, instruction and arithmetic pipeline, data hazards, control hazards, and structural hazards, techniques for handling hazards. 4. Exception handling. Pipeline optimization techniques. 5. Compiler techniques for improving performance. 6. Hierarchical memory technology: Inclusion, Coherence and locality properties. 7. Cache memory organizations, Techniques for reducing cache misses, Virtual memory organization. 8. Mapping and management techniques, memory replacement policies. 9. Instruction-level parallelism: basic concepts, techniques for increasing ILP, superscalar, super-pipelined and VLIW processor architectures. 10. Array and vector processors. 11. Multiprocessor architecture: taxonomy of parallel architectures. 12. Centralized shared-memory architecture: synchronization, memory consistency, interconnection networks. 13. Distributed shared-memory architecture. Cluster computers. 14. Non von Neumann architectures: data flow computers, reduction computer architectures, systolic architectures. |
Coursework | The coursework for all students consists of
semi-regular quizzes/vivas and take-home assignments, in addition to mid-sem and end-sem exams and one programming assignment. |
Communication | We will update the course
schedule regularly throughout the course. Assignment / Scribes / Quizzes
Handouts / Study Materials
General discussion
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Late policy | We will accept the take home assignments/scribes 24
hours late with a 15% penalty. Assignments more than a day
late will not be accepted without a previously approved
extension. Of course, in exceptional circumstances related to personal emergencies, serious illness, wellness concerns, family emergencies, and similar, please make the course staff aware of your situation and we will do our best to find a mutually agreeable solution. |
Programming assignment | 20% |
Semester exams |
70% |
Quiz, Class Participation |
10% |
Teams HPCA 2023
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