Sudipa Mandal Research Scholar Department of Computer Science and Engineering Indian Institute of Technology Kharagpur Address :   Department of Computer Science and Engineering,                     IIT Kharagpur, Kharagpur, West Bengal 721 302, INDIA. Emails:   sudipa [dot] mandal [at] cse [dot] iitkgp [dot] ernet [dot] in                 contacttosudipamandal [at] gmail [dot] com Others:   LinkedIN

About

Research Interests

• Power Intent Verification for Low-Power Multi-Voltage Designs
• Simulation-Based, Formal and Semi-Formal Verification and Coverage of Digital VLSI Designs
• Analog and Digital Mixed-Signal SOC Verification
• Power and Thermal Optimization of Power Management Logic

Education

• 2015-present:   Doctor of Philosophy (PhD) in Computer Science and Engineering from IIT Kharagpur
Research Domain:   Formal Verification of Analog-Digital Mixed-Signal Components, Power and Thermal Optimization of Power Management Logic.
Advisors:   Prof. Pallab Dasgupta and Dr. Aritra Hazra


• 2015:   Master of Technology (M.Tech) in Computer Science and Engineering from IIT Kharagpur
Thesis Title:   Automata Based Modeling of Indian Classical Music
Advisors:   Prof. Pallab Dasgupta


• 2013:   Bachelor of Engineering (BE) in Computer Science and Engineering from Jadavpur University
Project Title:   Skin Lesion Segmentation
Project Guide:   Prof. Mita Nasipuri


• 2009:   Higher-Secondary (Class XII Board Exam)
Board:   West Bengal Council of Higher Secondary Education
School:   Bankura Mission Girls' High School


• 2007:   Secondary (Class X Board Exam)
Board:   West Bengal Board of Secondary Education
School:   Bankura Mission Girls' High School

Achievements and Awards

• 2017:   Best Student Paper Award in VLSI Design Conference 2017.


• 2009:   Second rank holder in Higher Secondary Examination (Class XII Board Exam) and received felicitation from the Governor of West Bengal.


• 2007:   Fifth rank holder in Secondary Examination (Class X Board Exam) and received felicitation from the Governor of West Bengal.

Publications        

2021

• Migrating Assertions from Dense to Discrete Time.   [J3]
  Sudipa Mandal, Pallab Dasgupta.
  Accepted in IEEE Transactions on Computer-Aided design of Integrated Circuits and Systems (TCAD), vol. V, no. N, pp. X-Y, 2021.
  
  

• An RL based Approach for Thermal-Aware Energy Optimized Task Scheduling in Multi-core Processors.   [C4]
  Sudipa Mandal, Krushna Gaurkar, Pallab Dasgupta, Aritra Hazra.
  Accepted in 34th International Conference on VLSI Design (VLSID), 2021.
  
  

2020

• Usage-driven Personalization of Power Management Logic.   [J2]
  Sudipa Mandal, Aritra Hazra, Pallab Dasgupta.
  Accepted in IEEE Embedded System Letters (ESL), vol. V, no. N, pp. X-Y, 2020.
  
  

• Assertions for Protecting Mixed-signal Latency Contracts in Power Management.   [J1]
  Sudipa Mandal, Pallab Dasgupta, Aritra Hazra, Chunduri Rama Mohan.
  Accepted in IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. V, no. N, pp. X-Y, 2020.
  
  

2018

• Formal Methods for Coverage Analysis of Power Management Logic with Mixed-Signal Components.   [C3]
  Sudipa Mandal, Aritra Hazra, Pallab Dasgupta, Chunduri Rama Mohan.
  In the 31st Proceedings of International Conference on VLSI Design (VLSID), pp.37-42, January 2018.
  
  
• AMS-Miner: Mining AMS Assertions Using Interval Arithmetic.   [C2]
  Antonio Anastasio Bruto da Costa, Shriya Dharade, Sudipa Mandal, Pallab Dasgupta.
  In the 31st Proceedings of International Conference on VLSI Design (VLSID), pp.404-409, January 2018.
  
  
• On the Deep Structure of Ragas and Analytic Rating of Music Scores.   [P1]
  Sudipa Mandal, Shilpi Chaudhuri, Antonio Anastasio Bruto da Costa, Gouri Karambelkar, Pallab Dasgupta.
  In Heritage Preservation 2018, pp.161-179.
  
  

2017

• Formal Verification of Power Management Logic with Mixed-Signal Domains.   [C1]
  Sudipa Mandal, Antonio A. Bruto da Costa, Aritra Hazra, Pallab Dasgupta, Bhushan Naware, Chunduri Rama Mohan and Sanjib Basu.
  In the 30th Proceedings of International Conference on VLSI Design (VLSID), pp. 239-244, January 2017.
  Awarded as the BEST STUDENT PAPER.
  
  

Projects

• Machine Learning at the Digital-Analog Boundary - a Contract Assurance Framework based on AMS Assertions.
Sponsoring Agency:   Intel, USA and SRIC, IIT Kharagpur
Duration:   September 2018 - Present
Consultants:   Prof. Pallab Dasgupta, Prof. Partha Pratim Chakrabarti and Dr. Aritra Hazra . (CSE, IIT Kharagpur)
Collaborator:   Dr. Chunduri Rama Mohan (Intel, USA)


• Formal Methods for Verification of Power Management in Mixed-Signal Designs.
Sponsoring Agency:   Intel, USA and SRIC, IIT Kharagpur
Duration:   September 2015 - August 2018
Consultants:   Prof. Pallab Dasgupta, Prof. Partha Pratim Chakrabarti and Dr. Aritra Hazra . (CSE, IIT Kharagpur)
Collaborator:   Dr. Chunduri Rama Mohan (Intel, USA)

Teaching Assistantships

• 2019:   Teaching Assistant in a specialized short course on Formal Verification for Synopsys R&D staff, Bangalore with Prof. Pallab Dasgupta and Dr. Aritra Hazra.


• 2019:   Course TA and Kolkata center coordinator in Artificial Intelligence Certification Course for Industries organized by Centre of Excellence in Artificial Intelligence under Prof. Pallab Dasgupta, Prof. Partha Pratim Chakrabarti, Dr. Aritra Hazra and Dr. Ansuman Banerjee.


• 2015:   Teaching Assistant in a Short Term Training Programme (STTP) on Introduction to Design of Algorithms organized by T10KT(Teach 10 thousand Teachers), NMEICT, IIT-Kharagpur under Prof. Pallab Dasgupta, Prof. Partha Pratim Chakrabarti and Prof. Partha Pratim Das.

• Teaching Assistantships (@ Dept. of CSE, IIT-Kharagpur)



Year	Session/Semester	Course/Subject	Teacher
2014	Autumn	Programming and Data Structure (Lab)	Prof. Pralay Mitra
2015	Spring	Database Management System (Theory and Lab)	Prof. Pallab Dasgupta, Prof. Animesh Mukherjee
	Autumn	Embedded Systems Lab	Prof. Pallab Dasgupta
2016	Spring	Formal Systems	Prof. Pallab Dasgupta
	Autumn	Artificial Intelligence	Prof. Pallab Dasgupta,Prof. Partha Pratim Chakrabarti