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Sujoy Sinha Roy

MS Student (Completed)
Computer Science and Engineering,
Indian Institute of Technology Kharagpur, West Bengal


Research interests: Design and Analysis of Elliptic Curve Cryptography Algorithms on FPGAs.
Supervisor: Prof. Debdeep Mukhopadhyay

Contact:
Sujoy Sinha Roy
Department of Computer Science and Engg, Networking Lab
IIT Kharagpur, WestBengal, PIN: 721302
India

Email: sujoyetc@cse.iitkgp.ernet.in; sujoyetc@gmail.com

Publications:
Journals

  1. C. Rebeiro, S. S. Roy, D. S. Reddy, and D. Mukhopadhyay, "Revisiting the Itoh-Tsujii Inversion Algorithm for FPGA Platforms", IEEE Transactions on Very Large Scale Integration Systems, 2011. [Link]

  2. Sujoy Sinha Roy, Chester Rebeiro and Debdeep Mukhopadhyay, \Design and Analysis of Elliptic Curve Cryptoprocessor for Speed on k-LUT based FPGAs," Accepted in IEEE Transactions on Very Large Scale Integration Systems.

  3. Sujoy Sinha Roy, Chester Rebeiro and Debdeep Mukhopadhyay, "Generalized High Speed Itoh-Tsujii Multiplicative Inversion Architecture for FPGAs", Accepted in Integration, the VLSI Journal, Elsevier.


Conferences

  1. Sujoy Sinha Roy, Chester Rebeiro and Debdeep Mukhopadhyay, \A Parallel Architecture for Koblitz Curve Scalar Multiplications on FPGA Platforms," Accepted in DSD 2012.

  2. Chester Rebeiro, Sujoy Sinha Roy, and Debdeep Mukhopadhyay, \Pushing the Limits of High-Speed GF(2m) Elliptic Curve Scalar Multiplication on FPGAs," Accepted in CHES 2012.

  3. Sujoy Sinha Roy, Chester Rebeiro and Debdeep Mukhopadhyay, "Accelerating Itoh-Tsujii Multiplicative Inversion Algorithm for FPGAs", To Appear in the Proceedings of GLSVLSI 2011. [Link]

  4. Sujoy Sinha Roy, Chester Rebeiro and Debdeep Mukhopadhyay, "Theoretical Modeling of the Itoh-Tsujii Inversion Algorithm for Enhanced Performance on k-LUT based FPGAs", To Appear in the Proceedings of DATE 2011. [Link]

    MS Thesis : Design and Analysis of Elliptic Curve Cryptosystems on FPGAs [pdf ]

Present Projects


  1. Development of Elliptic Curve Crypto Processor
    Supervisor: Prof. Debdeep Mukhopadhyay
    Sponsor: DRDO, India
  2. Hardware for PSEC-KEM
    Supervisor: Prof. Debdeep Mukhopadhyay
    Sponsor: NTT Corporation, Japan [
  3. Link]

    Presentations
    Design, Automation and Test in Europe, Grenoble, France, 2011.

    Work Experience
    Research Consultant, Sponsored Research & Industrial Consultancy, IIT Kharagpur (Dec, 2009 - 2012)
    Assistant Systems Engineer, Tata Consultancy Services, Mumbai (2007 - 2009)

    Education
    BE : 76.5% (Honors) in Electronics & Telecommunication Engineering, Bengal Engineering and Science University, Shibpur, West Bengal, India (2007)
    MS : 9.6/10 in Computer Science & Engineering, Indian Institute of Technology Kharagpur (2012)

    Teaching
    Foundation of Computing (Spring 2011 & )
    Programming & Data Structures Lab (Autumn 2010)

    Important Links