About

I am a PhD student in Dept. of Computer Science and Engineering, IIT Kharagpur. My Phd work is based on diagnosis of digital VLSI circuits.

Academic

  • Joined as a PhD student in Dept. of Computer Science and Engineering, IIT Kharagpur, in July, 2010.
  • Received M.S (by research) degree in Electronics and Electrical Communication Engineering Department, IIT Kharagpur with a CGPA of 9.84 in July, 2010.
  • Received B.Tech degree in Electronics Communication Engineering Department from Institute of Engineering and Management under West Bengal University of Technology with a DGPA of 8.38 in July 2007.

Research

  • Working as a Research Consultant in the Project titled "Synopsys CAD Laboratory Projects", sponsored by Synopsys Inc., India, since January 2010.
  • Worked as a Reseach Assistant in the Project titled "Strategies for Reducing Power Consumption during VLSI Circuit Testing", sponsored by DIT, Govt. of India from October 2007 to December 2009.

    • Reseach Interest: VLSI Testing and Diagnosis, CAD

Publications

Book

  • "Strategies to Reduce Power during VLSI Circuit Testing", Subhadip Kundu, Santanu Chattopadhyay, LAP Lambert Academic Publishing ( 2012-09-25 ), ISBN-13: 978-3-659-25520-5.

Journals

  • "A Metric for Test Set Characterization and Customization Towards Fault Diagnosis", Subhadip Kundu, Sankhadeep Pal, Santanu Chattopadhyay, Indranil Sengupta and Rohit Kapur, in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) (in Production), 2013.
  • "A Framework for Multiple Fault Diagnosis based on Multiple Fault Simulation using Particle Swarm Optimization", Subhadip Kundu, Aniket Jha, Santanu Chattopadhyay, Indranil Sengupta and Rohit Kapur, in IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2013.
  • "Customizing completely specified pattern set targeting dynamic and leakage power reduction during testing", Krishna Kumar S., Subhadip Kundu, and Santanu Chattopadhyay, in INTEGRATION, the VLSI journal: 45(2): 211-221 (2012).
  • "Efficient don't care filling and scan-chain masking for low-power testing", Subhadip Kundu, Santanu Chattopadhyay, International Journal of Computer Aided Engineering and Technology (IJCAET), 4(2): 101-125 (2012).

Conferences

  • "An ATE Assisted DFD Technique for Volume Diagnosis of Scan Chains", Subhadip Kundu, Santanu Chattopadhyay, Indranil Sengupta and Rohit Kapur, in 50th ACM/IEEE Design Automation Conference (DAC), 2013 (Nominated for Best paper Award).
  • "Aggresive Scan Chain Masking for Improved Diagnosis of Multiple Scan Chain Failures", Subhadip Kundu, Santanu Chattopadhyay, Indranil Sengupta and Rohit Kapur, in 18th IEEE European Test Symposium (ETS), 2013.
  • "Confidence based power aware testing", Tapas Kr. Maiti, Subhadip Kundu, Arpita Dutta and Santanu Chattopadhyay, in IEEE International Symposium on Electronic System Design (ISED).
  • "A Diagnosability Metric for Test Set Selection targeting better Fault Detection", Subhadip Kundu, Santanu Chattopadhyay, Indranil Sengupta and Rohit Kapur, in 25th IEEE International Conference on VLSI Design (VLSID), 2012.
  • "Multiple fault diagnosis based on multiple fault simulation using Particle Swarm Optimization", Subhadip Kundu, Santanu Chattopadhyay, Indranil Sengupta and Rohit Kapur, in 25th IEEE International Conference on VLSI Design (VLSID), 2011.
  • "Customizing Pattern Set for Test Power Reduction via Improved X-identification and Reordering", Krishna Kumar S., S. Kaundinya, Subhadip Kundu, and Santanu Chattopadhyay, in 16th ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED, 2010).
  • "Particle Swarm Optimization based Vector Reordering for Low Power Testing", Krishna Kumar S., S. Kaundinya, Subhadip Kundu, and Santanu Chattopadhyay, in IEEE ICCCNT 2010, Karur, Tamilnadu.
  • "Test Power Reduction with Test-Time Trade-off", Subhadip Kundu, Krishna Kumar S., and Santanu Chattopadhyay, IEEE International Symposium on Circuits and Systems, in ISCAS 2010.
  • "Test Pattern Selection and Customization Targeting Reduced Dynamic and Leakage Power Consumption", Subhadip Kundu, Krishna Kumar S., and Santanu Chattopadhyay, in 18th Asian Test Symposium, ATS 2009.
  • "Efficient don't care filling for power reduction during testing", Subhadip Kundu and Santanu Chattopadhyay, in International Conference on Advances in Recent Technologies in Communication and Computing, ARTCom 2009 (Best Paper Award).
  • "Scan-chain Masking Technique for Low Power Circuit Testing", Subhadip Kundu and Santanu Chattopadhyay, in IEEE 1st Asia Symposium on Quality Electronic Design, ASQED 2009.
  • "A novel technique to reduce both leakage and peak power during scan testing", Subhadip Kundu, Santanu Chattopadhyay and Kanchan Manna, in IEEE Region 10 Colloquium and the Third ICIIS, 2008 ,Kharagpur, INDIA.
  • "Input assignment technique for low power circuit testing" , Subhadip Kundu, Kanchan Manna, Tapas Kr. Maiti, Santanu Chattopadhyay, in IEEE VLSI Design and Test Symposium, 2008.

Teaching Activities

  • Teaching Assistant for "Testing and Verification of Circuits" (Autumn 2010, 2011, 2012)
  • Teaching Assistant for "CAD for VLSI Design" (Spring 2013)
  • Teaching Assistant for "High Performance Computer Architecture" (Spring 2012)
  • Teaching Assistant for "Low Power Circuits" (Spring 2011)
  • Teaching Assistant for "Design and Analysis of Algorithm" (Spring 2010)