register_file Project Status (10/30/2012 - 17:57:12)
Project File: kgprisc.xise Parser Errors: No Errors
Module Name: register_file Implementation State: Synthesized
Target Device: xc3s400-4pq208
  • Errors:
 
Product Version:ISE 12.4
  • Warnings:
 
Design Goal: Balanced
  • Routing Results:
 
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
 
Environment: System Settings
  • Final Timing Score:
  
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis ReportCurrentTue 30. Oct 17:51:52 2012   
Translation Report     
Map Report     
Place and Route Report     
CPLD Fitter Report (Text)     
Power Report     
Post-PAR Static Timing Report     
Bitgen Report     
 
Secondary Reports [-]
Report NameStatusGenerated
ISIM Simulator LogOut of DateFri 19. Oct 11:53:51 2012
Post-Synthesis Simulation Model ReportOut of DateTue 30. Oct 17:57:11 2012

Date Generated: 10/30/2012 - 17:59:53