Prabhash Golla

IIT Kharagpur · Computer Science & Engineering · Dual Degree

Golla
Meghanandh Manvith
Prabhash

Building distributed systems, deep learning models, and full-stack applications.

About

I'm a prefinal-year Dual Degree (B.Tech + M.Tech) student at IIT Kharagpur, specializing in Computer Science and Engineering. My work spans distributed systems, deep learning, networking, and full-stack development.

From designing fault-tolerant distributed databases to building transformer-based image captioning systems, I enjoy working at the intersection of systems engineering and machine intelligence.

Outside academics, I am an Expert on Codeforces and Guardian on LeetCode, Tech Head at KodeinKGP and a medalist in IIT Kharagpur's General Championship across maths olympiad, open soft, football, yoga, and product management.

Location

IIT Kharagpur, West Bengal, India

Home: Andhra Pradesh

Degree

B.Tech (Hons.) + M.Tech — 5Y Dual Degree

IIT Kharagpur, 2022 – 2027

Email

prabhashgolla2004@gmail.com

Languages Known

English, Hindi, Telugu

Education

2022 – 2027

B.Tech (Hons.) + M.Tech Dual Degree

Computer Science & Engineering — IIT Kharagpur

2022

Board of Intermediate Education, AP

Sasi New Gen Junior College, Velivennu

2020

Board of Secondary Education, AP

Sasi English Medium High School, Velivennu

Internships

Software Engineering Intern

Rippling — Benefits Marketplace Integrations

May '26 — Jul '26

Created a full-stack platform product to replace Box.com for end-to-end insurance form lifecycle management.
Developed the InHouse Form Manager and AI Powered Mapper, achieving a 70–95% reduction in manual mapping work.
Engineered an Agentic AI Vision Loop using gpt-5.4 with multi-attempt feedback heuristics for widget, label, and coordinate extraction on scanned PDFs.
Architected an asynchronous ML workflow service (ml-service) integrating gpt-4o-mini for cost-effective hybrid text mapping and automated AcroForm PDF generation.
Executed a batched, scheduled migration of ~28,000 legacy carrier forms from Box to Rippling-managed S3 infrastructure.
Saved 12,000+ Ops hours annually and $36K in Box subscription fees while derisking $3.5M in monthly ARR.

TypeScript Django Agentic AI LLM Gateway AWS S3 Adobe Acrobat

Projects

HFT / High Performance IIT KGP Open Soft 2026

Project Synthetic-Bull

Full-stack simulation stack operating on High-Frequency Trading (HFT) principles for real-time stock/crypto exchange emulation.

Implemented a Zero-Allocation strategy on the Go hot-path with Arena-based memory management and Intrusive Red-Black Trees for the Limit Order Book (LOB).
Single-writer deterministic matching engine achieving <1μs latency; utilized an event-driven SPMC Ring Buffer for non-blocking data dissemination.
Developed Market Maker and Alpha bots leveraging statistical approaches including OBI (Order Book Imbalance) and EMA crossover strategies.
Guaranteed system state integrity via Write-Ahead Logging (WAL) for deterministic replay and recovery.

GoReactZustandPostgreSQLWebSocketsVite

Systems / DBMS Mar – Apr '25

Distributed Data Management System

High-availability distributed database engine featuring dynamic sharding, consistent hashing, and automated fault-recovery mechanisms.

Scalable distributed database with sharding, replication, and consistent hashing for load balancing
Python-based (Quart) async load balancer with automatic failure recovery mechanism
Containerized via Docker & Docker Compose for multi-server deployment simulation
Fault-tolerant recovery by detecting server failures and spawning replicas with restored shard data
RESTful CRUD APIs for shard-level operations, range queries, and dynamic reconfiguration

PythonQuartDockerREST APIConsistent Hashing

Networking Feb – Mar '25

Reliable Transport Protocol (KTP)

Custom L4 transport protocol implemented over UDP featuring sliding-window flow control and concurrent multi-threaded execution.

Custom reliable transport protocol (KTP) using C over UDP with adaptive timeout retransmission
Multi-threaded architecture using Pthreads and shared memory for concurrent send/receive operations
Mutex synchronization to prevent race conditions across multiple connections

CUDPPthreadsShared MemoryMutex

Computer Architecture Oct – Nov '24

32-bit RISC Processor Design

Complete hardware-level implementation of a MIPS-inspired RISC architecture with a custom ISA and automated assembler.

Custom 32-bit RISC processor with complete ISA supporting ALU operations and branching
Python-based assembler translating MIPS32 instructions into binary codes
Validated via FPGA implementation and comprehensive testbench-based verification

VerilogMIPS32FPGAPython

Full Stack / DBMS Feb – Mar '25

Gram Panchayat Management System

Enterprise governance platform built on relational ER modeling for secure digital administration of citizen and asset data.

Full-stack web system using Flask and PostgreSQL to manage citizens, assets, and governance data
ER schema integrating welfare schemes, census data, education, and vaccinations
Role-based access for citizens, employees, admins, and monitors with secure reporting

FlaskPostgreSQLPythonRBAC

Hardware / Logic Design Apr '24

12-Hour Digital Clock

Precision hardware circuit utilizing discrete IC components and calibrated 555-timer oscillators for real-time temporal tracking.

Digital circuit displaying hours and minutes on 7-segment LEDs; seconds via blinking light
555-timer-based Astable Multivibrator calibrated to oscillate at a precise 1-second period
User-defined timer presets and adjustable clock frequency via custom digital circuit
Counter ICs and flip-flops for real-time minute and hour tracking and display output

555 Timer7-Segment LEDCounter ICsFlip-flops

Achievements

Gold Medal (Captain)
GC Maths Olympiad 2026, IIT Kharagpur

Gold Medal (Captain)
GC Open Soft 2026, IIT Kharagpur

Multi-Disciplinary Silver
Football (GC '23), Yoga ('23), Product Management ('23)

Leadership & Experience

Tech Head

KodeinKGP — IIT Kharagpur

May '24 — May '25

Led a diverse team of 50+ members, overseeing website maintenance and overall tech architecture
Promoted technology and framework adoption in web development through informative seminars and workshops

Web Developer & Tree Census Coordinator

Technology Environment Society — IIT Kharagpur

Mar '23 — May '25

Led web development initiatives to maintain and upgrade the society's digital presence
Coordinated the Tree Census project, utilizing strong team building and event management skills

Sub-head

Shaurya — IIT Kharagpur

Jul '23 — Jun '24

Managed logistics and event operations for Shaurya, ensuring smooth execution of activities

Contact

Let's build
something remarkable
together.

Open to internship opportunities, research collaborations, and interesting engineering challenges. My inbox is always open — don't hesitate to reach out.

GitHub