#  Generic Template
## Net fpga_0_Generic_GPIO_GPIO_IO_pin<0> LOC=;
#Net fpga_0_clk_1_sys_clk_pin TNM_NET = sys_clk_pin;
#TIMESPEC TS_sys_clk_pin = PERIOD sys_clk_pin 50000 kHz;
## Net fpga_0_clk_1_sys_clk_pin LOC=;
#Net fpga_0_rst_1_sys_rst_pin TIG;
## Net fpga_0_rst_1_sys_rst_pin LOC=;

#  Generic Template
#Net fpga_0_LEDS_GPIO_IO_O_pin<0> LOC=AB19;
Net fpga_0_Generic_GPIO_GPIO_IO_pin<0> LOC=Y7;
Net fpga_0_clk_1_sys_clk_pin TNM_NET = sys_clk_pin;
TIMESPEC TS_sys_clk_pin = PERIOD sys_clk_pin 24000 kHz;
Net fpga_0_clk_1_sys_clk_pin LOC=A12;
Net fpga_0_rst_1_sys_rst_pin TIG;
Net fpga_0_rst_1_sys_rst_pin LOC=M19;
#Net fpga_0_clk_1_sys_clk_pin LOC=A10;