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Research Statement

Projects

Resume

Publications

Talks and Training

Awards

Publications


Thesis

  1. C. Rebeiro, ''Architectural Explorations for Elliptic Curve Cryptography on FPGAs'', MS Thesis, Department of Computer Science and Engineering, IIT Madras, 2009 [link]

Journals

  1. C. Rebeiro and D. Mukhopadhyay, ''Boosting Profiled Cache Timing Attacks with Apriori Analysis'', accepted in IEEE Transactions Information Forensics and Security, August 2012 [link]

  2. S.S. Roy, C. Rebeiro, and D. Mukhopadhyay, ''Theoretical Modeling of Elliptic Curve Scalar Multiplier on LUT Based FPGAs for Area and Speed'', accepted in IEEE Transactions on Very Large Scale Integration Systems, April 2012 [link]

  3. S.S. Roy, C. Rebeiro, and D. Mukhopadhyay, ''Generalized High Speed Itoh-Tsujii Multiplicative Inversion Architecture for FPGAs'', accepted in Integration, the VLSI Journal, Elsevier, January 2012 [link]

  4. C. Rebeiro, S. S. Roy, D. S. Reddy, and D. Mukhopadhyay, ''Revisiting the Itoh-Tsujii Inversion Algorithm for FPGA Platforms'', IEEE Transactions on Very Large Scale Integration Systems, Volume 19, Issue 8, pp 1508-1512, August 2011 [link]

Conferences

  1. S. Bhattacharya, C. Rebeiro, and D. Mukhopadhyay, ''Hardware Prefetchers Leak : A Revisit of SVF for Cache-Timing Attacks'', accepted in HASP 2012 (held in conjunction with MICRO-45)

  2. N. Phuong Ha, C. Rebeiro, D. Mukhopadhay, and W. Huaxiong, ''Improved Differential Cache Trace Attacks on SMS4'', accepted in Inscrypt 2012

  3. S. S. Roy, C. Rebeiro, and D. Mukhopadhyay, ''A Parallel Architecture for Koblitz Curve Scalar Multiplications on FPGA Platforms'', accepted in DSD 2012

  4. C. Rebeiro, S. S. Roy, and D. Mukhopadhyay, ''Pushing the Limits of High-Speed GF(2^m) Elliptic Curve Scalar Multiplication on FPGAs'', in the Proceedings of the 14th International Workshop on Cryptographic Hardware and Embedded Systems, CHES 2012, Leuven, Belgium, pp 494-511, LNCS 7428 [link]

  5. C. Rebeiro and D. Mukhopadhyay, ''A Formal Analysis of Prefetching in Profiled Cache Timing Attacks'', Workshop on Cryptograhic Hardware and Embedded Systems, CHES 2012, Leuven, Belgium (poster)

  6. C. Rebeiro, R. Poddar, A. Datta, and D. Mukhopadhyay, ''An Enhanced Differential Cache Attack on CLEFIA for Large Cache Lines'', in the Proceedings of the 12th International Conference on Cryptology in India, INDOCRYPT 2011, Chennai, India, pp 58-75, LNCS 7107 [link]

  7. R. Poddar, A. Datta, and C. Rebeiro, ''A Cache Trace Attack on CAMELLIA'', in the Proceedings of First International Conference on Security Aspects in Information Technology, InfoSecHiComNet 2011, Haldia, India, pp 141-156, LNCS 7011 [link]

  8. S. S. Roy, C. Rebeiro, and D. Mukhopadhyay, ''Accelerating Itoh-Tsujii Multiplicative Inversion Algorithm for FPGAs'', in the Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI (GLSVLSI 2011), Lausanne, Switzerland, pp 67-72, ACM [link]

  9. S. S. Roy, C. Rebeiro, and D. Mukhopadhyay, ''Theoretical Modeling of the Itoh-Tsujii Inversion Algorithm for Enhanced Performance on k-LUT based FPGAs'', in the Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE 2011), IEEE Computer Society [link]

  10. C. Rebeiro and D. Mukhopadhyay, ''Cryptanalysis of CLEFIA using Differential Methods with Cache Trace Patterns'', in the Proceedings of the Topics in Cryptology - CT-RSA 2011 - The Cryptographers' Track at the RSA Conference 2011, San Francisco, CA, USA, pp 89-103, LNCS [link]

  11. C. Rebeiro, M. Mondal, and D. Mukhopadhyay, ''Pinpointing Cache Timing Attacks on AES'', in the Proceedings of 23rd International Conference on VLSI Design (VLSID 2010), pp 306-311, IEEE Computer Society [link]

  12. C. Rebeiro, D. Mukhopadhyay, J. Takahashi and T. Fukunaga, ''Cache Timing Attacks on CLEFIA'', in the Proceedings of the 10th International Conference on Cryptology in India, INDOCRYPT 2009, New Delhi, India, pp 114-118 LNCS [link]

  13. S. S. Ali, C. Rebeiro, and D. Mukhopadhyay, ''Cache Aware Tools for Cryptographic Applications'', in the National Workshop on Cryptology, 2009.

  14. C. Rebeiro and D. Mukhopadhyay, ''High Speed Compact Elliptic Curve Cryptoprocessor for FPGA Platforms'', in the Proceedings of 9th International Conference on Cryptology in India, INDOCRYPT 2008, Kharagpur, India, pp. 377-388 LNCS [link]

  15. C. Rebeiro and D. Mukhopadhyay, ''High Performance Elliptic Curve Crypto-Processor for FPGA Platforms'', in the Proceedings of the 12th IEEE VLSI Design and Test Symposium, Bangalore, India, July 2008, pp. 107-117, VLSI Society of India [link]

  16. D. Mukhopadhyay, D. R. Chowdhury, and C. Rebeiro, Theory of Composing Non-linear Machines with Predictable Cyclic Structures in the Proceedings of the 8th International Conference on Cellular Automata for Research and Industry, ACRI 2008, Japan, pp. 210-219, LNCS [link]

  17. C. Rebeiro and D. Mukhopadhyay, ''Power Attack Resistant Efficient FPGA Architecture for Karatsuba Multiplier'', in the Proceedings of the 21st IEEE Conference on VLSI Design, VLSID 2008, Hyderabad, India, January 2008, pp. 706-711, IEEE Computer Society [link]

  18. C. Rebeiro and D. Mukhopadhyay, ''Hybrid Masked Karatsuba Multiplier for GF(2233)'', in the Proceedings of the 11th IEEE VLSI Design and Test Symposium, VDAT 2007, Kolkata, India, August 2007, pp. 379-387, VLSI Society of India [link]

  19. C. Rebeiro, D. Selvakumar, and A.S.L. Devi, ''Bitslice Implementation of AES'', in the Proceedings of the 5th International Conference on Cryptology and Network Security, CANS 2006, Suzhou, China, December 2006, pp. 203-212, LNCS [link]

  20. D. Selvakumar, C. Rebeiro, and R. Pitchiah, ''Fault Tolerant SCADA with CORBA on LANE ATM'', International Conference on Dependable Systems and Networks, DSN 2005, Yokohama, Japan, July 2005 (Fast Abstract)

  21. D. Selvakumar, C. Rebeiro, and R. Pitchiah, ''SCADA with Fault Tolerant CORBA on Fault Tolerant LANE ATM'', 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05), Colorado, USA, April 2005, pp. 706-711, IEEE Computer Society [link]

  22. D. Selvakumar, C. Rebeiro, and R. Pitchiah, ''SCADA with Fault Tolerant CORBA'', Asia Pacific Conference on Parallel and Distributed Computing (ObComAPC), India, 2004 (Best Paper Award)

  23. D. Selvakumar and C. Rebeiro, ''RTLinux on Memory Constraint Systems'', 6th RTLinux Workshop, NTU, Singapore, November 2004 [link]

  24. G.C. Ravindra, C. Rebeiro, D. Selvakumar, and R. Pitchiah, ''Fault Tolerant LANE based ATM Network for Fault Tolerant CORBA Test Bed'', International Conference on Communications and Broadband Networking (ICBN), Bangalore, May 2003