Projects
Design and Evaluation of PSEC-KEM in Hardware and Software
Sponsor : NTT, Japan
Duration : 2010 - 2011
Role : Senior Project Officer
The goal of this project was to evaluate the performance of PSEC-KEM on random, Koblitz, and OEF based elliptic curves on FPGAs and in software. In software, I worked with the implementations over OEF, while in hardware I implemented PSEC-KEM with random elliptic curves. I teamed up with Sujoy Sinha Roy for the hardware part. A link for this project including source code and documentation can be found here: [http://cse.iitkgp.ac.in/~debdeep/osscrypto/psec/psec.html].
Design of Side Channel Attack Resistant Programmable Block Ciphers on FPGAs
Sponsor : DIT, New Delhi
Duration : 2010 -
Role : Senior Project Officer
The goal of this project is to design block ciphers that are resistant against power attacks.
Cache Timing Attacks on CLEFIA
Sponsor : NTT, Japan
Duration : 2009
Role : Senior Research Fellow
Developed a profiled timing attack on Sony's block cipher CLEFIA. The entire CLEFIA key can be obtained in less than 15 minutes on an Intel Core 2 Duo system.
VLSI Design of Elliptic Curve Crypto Systems Tolerant Against Power Attacks
Sponsor : SRIC, IIT Kharagpur
Duration : 2009-2010
Role : Senior Research Fellow
Developed a ECC scalar multiplier for GF(2^233) for FPGA platforms. Source code for this work can be downloaded from here [http://cse.iitkgp.ac.in/~debdeep/osscrypto/eccpweb/index.html].
Cryptanalysis : Algorithms and High Performance Computing Techniques (First and Second Phase)
Sponsor : MIT, New Delhi
Duration : 2005 - 2007 and 2008 - 2009
Role : Member Technical Staff during the first phase and Project Leader for the second phase
Worked on acclerators for cryptanalysis using FPGAs and PARAM clusters. Also developed software for high speed AES and DES using bitslice techniques optimized for x86 architectures.
I was the project leader for the second phase of the project (2008-09), and led a group of 6 engineers.
RTLinux on Memory Constrained Systems
Sponsor : DRDO, Hyderabad
Duration : 2003 - 2004
Role : Member Technical Staff
Developed real time Linux board support package for mission critical applications. The Linux kernel was tweaked to boot in less than half a second and made to run in a deeply embedded 80486 platform with 2MB RAM and 2MB Flash memory . It used a cramfs file system, dietlibc, and I wrote RTLinux device drivers for flash memory and MIL1553 communication controller.
Development of CompactPCI Industrial Computer
Sponsor : MIT, New Delhi
Duration : 2001 - 2003
Role : Member Technical Staff
Designed and developed Compact PCI boards with TigerSHARC DSP and six channel data acquisition. Also developed hot-swappable analog output boards for industrial process control. Besides design of the board, the work involved PCB design for high-speed circuits , signal integrity tests (using Cadstar), analog-digital mixed signal design , hardware testing, BIOS development (using Tiny BIOS) and Linux device driver support. The boards were used for vibration analysis.
Development of Real Time Fault Tolerant Systems for Industrial Applications
Sponsor : MIT, New Delhi
Duration : 1999 - 2001
Role : Engineer Trainee / Member Technical Staff
Developed fault tolerant extensions for CORBA for SCADA applications. It supported view synchronous group communication, message logging, fault detection, and recovery.
COMED Promming Station
Sponsor : SDI, Airforce, Bangalore
Duration : 2000 - 2001
Role : Member Technical Staff
Assisted in the development of an AMD 80186 processor based system to burn EPROMs for the SEPECAT Jaguar.
Data Acquisition Units for Automated Work Flow
Sponsor : CPRI, Bangalore
Duration : 1999 - 2002
Role : Engineer Trainee / Member Technical Staff