Anju P Johnson


PhD Student
Roll No: 12CS92P01
Secured Embedded Architecture Laboratory
Department of Computer Science and Engineering
Indian Institute of Technology Kharagpur


RESEARCH

I am pursuing PhD in the field of hardware security under the supervision of Prof. Rajat Subhra Chakraborty and Prof. Debdeep Mukhopadhyay
PUBLICATIONS
    Journal

    1. Anju P.Johnson., Rajat Subhra Chakraborty and Debdeep Mukhopadyay,“A PUF-enabled Secure Architecture for FPGA-based IoT Applications", IEEE Transactions on Multi-scale Computing Systems (TMSCS),2015 vol.PP, no.99.
    Conference

    1. Anju P. Johnson, Rajat Suhbra Chakraborty and Debdeep Mukhopadhyay, "Remote Dynamic Partial Reconfiguration of FPGA Based Embedded Systems: Threats and Countermeasures (Extended Abstract)", accepted in PhD forum, VLSI Design, January 2016.

    2. Anju P.Johnson., Rajat Subhra Chakraborty and Debdeep Mukhopadyay, “A Novel Attack on a FPGA based True Random Number Generator", Workshop on Embedded Systems Security (WESS,part of ACM ESWEEK) 2015, Amsterdam, The Netherlands.

    3. Anju P. Johnson, Sayandeep Saha, Rajat Subhra Chakraborty, Debdeep Mukhopadhyay and Sezer Goren, “Fault Attack on AES via Hardware Trojan Insertion by Dynamic Partial Reconfiguration of FPGA over Ethernet”, Workshop on Embedded Systems Security (WESS, part of ACM ESWEEK) 2014, New Delhi, India.
    Patent

    1. Anju P.Johnson., Rajat Subhra Chakraborty and Debdeep Mukhopadyay, “System for dynamic partial reconfiguration of FPGAs over Ethernet", Indian Patent filed on July 2015.
WORK EXPERIENCE
TEACHING ACTIVITIES
EDUCATION