EndSem answer scripts to be shown on 11-May-2016 (Wednesday) at 5:00pm in Crypto Lab (Top floor of CSE Annex Building)

Schedule

Instructors: Abhijit Das and Debdeep Mukhopadhyay
Theory: Wed(12:00–12:55), Thurs(11:00–11:55) [Tutorial], Fri(09:00–10:55) at NR223
Lab: Mon(14:00–16:55) at Hardware Lab (CSE Annex Building)
Teaching Assistants: Debapriya Basu Roy, Malay Pramanick, Pallavi Mitra, Pritam Bhattacharya, Poulami Das, Rajorshee Raha, Sarani Bhattacharya

Theory Syllabus

• Introduction: Logic design, transistors as switches, CMOS gates, sequential circuits, some examples.
• Digital Systems: Representation of numbers, binary codes, Gray code, error-detecting and error-correcting codes, registers, binary logic, basic logic gates.
• Boolean Algebra: Boolean operations, Boolean functions, algebraic manipulations, minterms and maxterms, sum-of-products and product-of-sum representations, two-input logic gates, functional completeness.
• Minimization of Boolean Functions: Karnaugh map, don't-care conditions, prime implicants, Quine–McCluskey technique, NAND/NOR circuits, introduction to Verilog.
• Combinational Circuits: Adder, subtractor, multiplier, comparator, decoders, encoders, multiplexers, demultiplexers, Verilog models of combinational circuits.
• Synchronous Sequential Circuits: Finite-state machines, latches and flip-flops (SR, D, JK, T), synthesis of clocked sequential circuits, Mealy and Moore machines, state minimization, Verilog models of sequential circuits.
• Registers and Counters: Registers and shift registers, sequential adders, binary and BCD ripple counters, synchronous counters
• Algorithmic State Machines: ASM charts, ASM blocks, controller and data-path design
• Asynchronous Sequential Circuits: Analysis and synthesis, static and dynamic hazards, elimination of hazards

Slides

• Introduction
• The world of bits
• Algebra of bits
• Make it small
• Combinational circuit design
• Synchronous sequential circuits
• Asynchronous sequential circuits

• Verilog basics
• Combinational circuits and Verilog
• Synchronous sequential circuits and Verilog
• Data path
• Control path
• Finite state machines

Tests

• Class Test 1
• Mid-Semester Test
• Class Test 2
• End-Semester Test

Lab Assignments

Module A: Boolean logic and combinational logic circuits
Module B: CMOS characteristics
Module C: Sequential circuits and finite state machines
Module D: Verilog programming
Module E: Pulse circuits

Module	Number	Topic	Date	Link
A	1	Combinational circuit design with NAND/NOR gates	11–Jan–2016	Click here
B	1	CMOS inverter characteristics	18–Jan–2016	Click here
A	2	Combinational circuit design with gates and arithmetic blocks	25–Jan–2016	Click here
D	1	Combinational circuit design with Verilog	08–Feb–2016	Click here
C	1	Flip-flop design	07–Mar–2016	Click here
C	2	Sequential circuit design	21–Mar–2016	Click here
D	2	Sequential circuit design with Verilog	28–Mar–2016	Click here
E	1	Astable and monostable multivibrators with 555 chip [Tutorial]	04–Apr–2016	Click here
C	3	Lab Test (Sequential circuit design)	12–Apr–2016	Session 1 Session 2
Switching Lab Datasheets

Books and References

1. M. Morris Mano and Michael D. Ciletti, Digital Design: With an Introduction to the Verilog HDL, 5th Edition, Pearson Education, 2013.
2. Zvi Kohavi and Niraj K. Jha, Swithcing and Finite Automata Theory, 3rd Edition, Cambridge University Press, 2010.
3. Randy H. Katz and Gaetano Borriello, Contemporary Logic Design, 2nd Edition, Pearson Education, 2005.
4. Joseph Cavanagh, Digital Design and Verilog HDL Fundamentals, CRC Press, 2008.
5. Samir Palnitkar, Verilog HDL: A Guide to Digital Design and Synthesis, Sunsoft Press, 1996.
6. Douglas J. Smith, HDL Chip Design: A Practical Guide for Designing, Synthesizing and Simulating ASICs & FPGAs Using VHDL or Verilog, Doone Publications, 1998.
7. http://www.asic-world.com/
8. Jacob Millman and Herbert Taub, Pulse, Digital and Switching Waveforms, 3rd Edition, Tata McGraw-Hill, 2011.
9. Herbert Taub and Donald L. Schilling, Digital Integrated Circuits, Tata McGraw-Hill, 2008.

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